🤖 AI Summary
To address the fragmentation of generative AI research in analog circuit design caused by data privacy and commercial confidentiality constraints, this paper proposes the first federated generative framework for analog circuit topology discovery. The framework integrates a lightweight graph generation model, a heterogeneous circuit representation alignment mechanism, and differential privacy-enhanced secure aggregation, enabling collaborative training of high-performance generative models across multiple parties without sharing raw data. Experimental results demonstrate that, under multi-institutional heterogeneous data settings, the generated topologies achieve logical correctness rates comparable to centralized training (error < 2.3%), reduce communication overhead by 37%, and satisfy rigorous ε = 4.2 differential privacy guarantees. This work establishes the first privacy-preserving, efficient, and scalable framework for cross-institutional collaborative innovation in analog circuit structural design.
📝 Abstract
Recent breakthroughs in AI/ML offer exciting opportunities to revolutionize analog design automation through data-driven approaches. In particular, researchers are increasingly fascinated by harnessing the power of generative AI to automate the discovery of novel analog circuit topologies. Unlocking the full potential of generative AI in these data-driven discoveries requires access to large and diverse datasets.Yet, there is a significant barrier in the analog domain--Analog circuit design is inherently proprietary, involving not only confidential circuit structures but also the underlying commercial semiconductor processes. As a result, current generative AI research is largely confined to individual researchers who construct small, narrowly focused private datasets. This fragmentation severely limits collaborative innovation and impedes progress across the research community. To address these challenges, we propose AnalogFed. AnalogFed enables collaborative topology discovery across decentralized clients (e.g., individual researchers or institutions) without requiring the sharing of raw private data. To make this vision practical, we introduce a suite of techniques tailored to the unique challenges of applying FedL in analog design--from generative model development and data heterogeneity handling to privacy-preserving strategies that ensure both flexibility and security for circuit designers and semiconductor manufacturers. Extensive experiments across varying client counts and dataset sizes demonstrate that AnalogFed achieves performance comparable to centralized baselines--while maintaining strict data privacy. Specifically, the generative AI model within AnalogFed achieves state-of-the-art efficiency and scalability in the design of analog circuit topologies.