Runtime Energy Monitoring for RISC-V Soft-Cores

2025-09-30

AI Summary

Real-time, low-overhead energy monitoring remains challenging for RISC-V soft-core processors during design space exploration, particularly due to reliance on complex microarchitectural models. Method: This paper proposes a hardware-assisted real-time energy monitoring approach that bypasses such models. It integrates an FPGA system-level module with a custom current/voltage measurement board to directly capture runtime electrical signals, exposing them via a memory-mapped interface for lightweight readout by a monitoring service—achieving high accuracy and low latency without consuming FPGA logic resources. Contribution/Results: The solution supports scalable deployment from single-node to multi-node clusters, enabling synchronized multi-point sampling and distributed analysis. Experimental evaluation demonstrates fine-grained energy-efficiency tracking during RISC-V soft-core execution of shallow neural networks. This provides empirical support for joint performance–energy optimization in power-constrained domains such as aerospace systems.

Technology Category

• Machine Learning: Hardware-aware ML
• Planning, Routing, and Scheduling: Plan Execution and Monitoring
• Computer Vision: Motion & Tracking

Application Category

• Systems and Infrastructure for Web, Mobile and WoT: Energy management for devices in mobile Web and WoT environments
• Security and Privacy: Large-scale security measurements
• User Modeling, Personalization and Recommendation: Attacks and countermeasures in recommendation systems

Abstract

Energy efficiency is one of the major concern in designing advanced computing infrastructures. From single nodes to large-scale systems (data centers), monitoring the energy consumption of the computing system when applications run is a critical task. Designers and application developers often rely on software tools and detailed architectural models to extract meaningful information and determine the system energy consumption. However, when a design space exploration is required, designers may incur in continuous tuning of the models to match with the system under evaluation. To overcome such limitations, we propose a holistic approach to monitor energy consumption at runtime without the need of running complex (micro-)architectural models. Our approach is based on a measurement board coupled with a FPGA-based System-on-Module. The measuring board captures currents and voltages (up to tens measuring points) driving the FPGA and exposes such values through a specific memory region. A running service reads and computes energy consumption statistics without consuming extra resources on the FPGA device. Our approach is also scalable to monitoring of multi-nodes infrastructures (clusters). We aim to leverage this framework to perform experiments in the context of an aeronautical design application; specifically, we will look at optimizing performance and energy consumption of a shallow artificial neural network on RISC-V based soft-cores.

Problem

• Monitoring energy consumption during application runtime on RISC-V systems
• Eliminating reliance on complex architectural models for energy measurements
• Enabling scalable energy monitoring for multi-node computing infrastructures

Innovation

• Runtime energy monitoring without architectural models
• Measurement board coupled with FPGA-based System-on-Module
• Scalable approach for multi-node infrastructure monitoring