🤖 AI Summary
This work addresses a critical limitation in existing memory tiering systems, which often neglect the significant impact of page size and hardware topology on performance when making page migration decisions. To overcome this, the authors propose a lightweight, eBPF-based page admission control mechanism that dynamically integrates page size and hardware topology information through a working-set-agnostic page profiling approach, enabling user-customizable migration policies. Notably, this solution requires no kernel modifications and seamlessly integrates into current systems. Evaluation across three mainstream memory tiering frameworks and seventeen diverse workloads demonstrates substantial performance gains, with geometric mean throughput improvements of up to 17.7% and peak speedups reaching 75% in specific scenarios.
📝 Abstract
Existing software-based memory tiering systems decide which pages to place on the slower or faster tier. However, they do not take into account two important factors that greatly influence application performance: the size of the migrated pages, and the underlying hardware device and tiering topology. We introduce TierBPF, a software mechanism that can be plugged into existing memory tiering systems to take these factors into account, by making simple binary page admission decisions. TierBPF is implemented as a set of eBPF hooks, which allow users to define their own custom policies. In order to make its decisions, TierBPF utilizes a lightweight tracking mechanism for page profiling which is not dependent on the application's working set size. TierBPF, integrated into three memory tiering systems and evaluated with 17 workloads, achieves geomean throughput gains of up to 17.7% with improvements of up to 75% for individual workloads.