Development of an Energy-Efficient and Real-Time Data Movement Strategy for Next-Generation Heterogeneous Mixed-Criticality Systems

📅 2026-02-10
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🤖 AI Summary
This work addresses the challenges of real-time performance, energy efficiency, and resource contention among multi-criticality tasks in heterogeneous mixed-criticality systems for applications such as autonomous driving and robotics. The paper proposes a hardware-software co-designed data movement strategy that, for the first time, tightly integrates mixed-criticality assurance mechanisms with energy-efficient data transmission. By leveraging heterogeneous architecture modeling, multi-criticality-aware scheduling, co-design of interconnect and memory subsystems, and application-aware dataflow management, the approach enables low-interference, highly predictable communication across criticality levels. Evaluated under representative ACES scenarios, the system demonstrates significantly improved energy efficiency, substantially reduced interference on high-priority tasks, and enhanced predictability of critical-task latency.

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📝 Abstract
Industrial domains such as automotive, robotics, and aerospace are rapidly evolving to satisfy the increasing demand for machine-learning-driven Autonomy, Connectivity, Electrification, and Shared mobility (ACES). This paradigm shift inherently and significantly increases the requirement for onboard computing performance and high-performance communication infrastructure. At the same time, Moore's Law and Dennard Scaling are grinding to a halt, in turn, driving computing systems to larger scales and higher levels of heterogeneity and specialization, through application-specific hardware accelerators, instead of relying on technological scaling only. Approaching ACES requires this substantial amount of compute at an increasingly high energy-efficiency, since most use cases are fundamentally resource-bound. This increase in compute performance and heterogeneity goes hand in hand with a growing demand for high memory bandwidth and capacity as the driving applications grow in complexity, operating on huge and progressively irregular data sets and further requiring a steady influx of sensor data, increasing pressure both on on-chip and off-chip interconnect systems. Further, ACES combines real-time time-critical with general compute tasks on the same physical platform, sharing communication, storage, and micro-architectural resources. These heterogeneous mixed-criticality systems (MCSs) place additional pressure on the interconnect, demanding minimal contention between the different criticality levels to sustain a high degree of predictability. Fulfilling the performance and energy-efficiency requirements across a wide range of industrial applications requires a carefully co-designed process of the memory system with the use cases as well as the compute units and accelerators.
Problem

Research questions and friction points this paper is trying to address.

mixed-criticality systems
energy-efficiency
real-time
heterogeneous computing
data movement
Innovation

Methods, ideas, or system contributions that make the work stand out.

heterogeneous mixed-criticality systems
energy-efficient data movement
real-time communication
hardware-software co-design
memory-system co-optimization
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