TRACE: Traversal and Reasoning Algebraic Computing Engine for Formal Hardware Verification

📅 2026-08-17
📈 Citations: 0
Influential: 0
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🤖 AI Summary
This study addresses the state explosion bottleneck in arithmetic circuit verification within the AI era by proposing TRACE, a novel framework integrating symbolic computer algebra, optimized traversal strategies, conflict elimination, and polarity optimization. TRACE establishes an efficient, compact symbolic representation and analysis system that enables the first formal verification of previously intractable optimized MAC circuits while demonstrating superior performance on adders and multipliers. Experimental results indicate that TRACE significantly enhances verification efficiency and substantially reduces memory consumption, effectively overcoming the limitations of existing tools. Consequently, this work provides a flexible and robust solution for verifying complex arithmetic circuits, advancing the state-of-the-art in formal hardware verification.
📝 Abstract
Modern hardware verification of complex circuits relies heavily on the efficiency of formal methods. For complex arithmetic circuits in particular Symbolic Computer Algebra (SCA) engines which represent pseudo-boolean functions using polynomials are crucial. As circuit complexity grows in the age of AI, verification of arithmetic primitives, including Multiplication, Addition, Multiply-Accumulate (MAC), becomes a computational bottleneck. To address this, we introduce TRACE (Traversal and Reasoning Algebraic Computing Engine), a highly efficient framework designed to investigate the intersection of traversal strategies and proof efficiency. Unlike existing SCA tools which are mainly limited to multipliers, TRACE offers a flexible framework for researchers to analyze memory usage and verification time across a wide range of arithmetic circuits (adder, multiplier and MAC). To overcome the state-explosion problem inherent in polynomial expansion, the engine incorporates advanced reduction techniques, including optimized traversal strategies, conflict removal, and polarity-based optimization for compact symbolic representations. Our experimental results show that for optimized MAC, for the first time, TRACE was able to verify previously unverifiable circuits
Problem

Research questions and friction points this paper is trying to address.

Formal Hardware Verification
Arithmetic Circuits
Symbolic Computer Algebra
State-explosion Problem
Computational Bottleneck
Innovation

Methods, ideas, or system contributions that make the work stand out.

Symbolic Computer Algebra
Formal Hardware Verification
Arithmetic Circuits
State-explosion Mitigation
Traversal Optimization
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