ForgeHLS: A Large-Scale, Open-Source Dataset for High-Level Synthesis

2025-07-03

AI Summary

The EDA community lacks large-scale, open-source, multi-level integrated circuit datasets, severely hindering algorithm evaluation and AI model training for critical tasks such as high-level synthesis (HLS). To address this, we introduce CircuitBench—the first open-source, large-scale circuit dataset—encompassing diverse designs including digital circuits, arithmetic units, and memory blocks. It provides four complementary representations: RTL code, post-mapping netlists, And-Inverter Graphs (AIGs), and post-placement netlists. Designed for diversity, extensibility, and task alignment, CircuitBench supports benchmarking and end-to-end deep learning for core EDA tasks like PPA (power, performance, area) optimization. Experimental results demonstrate significant improvements in AI model accuracy and robustness across cross-circuit generalization, few-shot adaptation, and optimization performance prediction. CircuitBench thus establishes a foundational data resource for AI-driven EDA research.

Technology Category

• Machine Learning: Hardware-aware ML
• Humans and AI: Other Foundations of Human Computation & AI
• Knowledge Representation and Reasoning: Computational Complexity of Reasoning

Application Category

• Economics, Online Markets and Human Computation: Data quality aspects of human-annotated datasets
• Graph Algorithms and Modeling for the Web: Foundation models and LLMs for Web-related graphs
• Search and Retrieval-Augmented AI: Web evaluation methodologies and metrics

Abstract

We introduce ForgeEDA, an open-source comprehensive circuit dataset across various categories. ForgeEDA includes diverse circuit representations such as Register Transfer Level (RTL) code, Post-mapping (PM) netlists, And-Inverter Graphs (AIGs), and placed netlists, enabling comprehensive analysis and development. We demonstrate ForgeEDA's utility by benchmarking state-of-the-art EDA algorithms on critical tasks such as Power, Performance, and Area (PPA) optimization, highlighting its ability to expose performance gaps and drive advancements. Additionally, ForgeEDA's scale and diversity facilitate the training of AI models for EDA tasks, demonstrating its potential to improve model performance and generalization. By addressing limitations in existing datasets, ForgeEDA aims to catalyze breakthroughs in modern IC design and support the next generation of innovations in EDA.

Problem

• Providing a large-scale open-source dataset for High-Level Synthesis (HLS)
• Enabling comprehensive analysis of circuit representations like RTL and AIGs)
• Facilitating AI model training for EDA tasks and PPA optimization)

Innovation

• Open-source dataset with diverse circuit representations
• Benchmarks EDA algorithms for PPA optimization
• Facilitates AI model training for EDA tasks