TRAM: Training Approximate Multiplier Structures for Low-Power AI Accelerators

2026-05-06

AI Summary

This work addresses the high power consumption of multipliers in AI accelerators by proposing a hardware-algorithm co-optimization approach that, for the first time, integrates trainable approximate multiplier (AxM) architectures into end-to-end neural network training. By jointly optimizing the hardware structure and the model parameters, this method overcomes the limitations of conventional design paradigms that treat hardware and models separately. The proposed technique achieves substantial power savings without compromising model accuracy: it reduces multiplier power consumption by up to 25.05% on a CNN trained on CIFAR-10 and by 27.09% on a Vision Transformer (ViT) evaluated on ImageNet, demonstrating superior energy efficiency across diverse model architectures and datasets.

Abstract

Reducing power consumption in AI accelerators is increasingly important. Approximate computing can reduce power consumption while keeping the accuracy loss small. Since multipliers are power-hungry components in AI models, this paper focuses on synthesizing low-power approximate multipliers (AxMs). Unlike prior works that design AxMs separately from AI model training, we present TRAM, which jointly optimizes the AxM structure and AI model parameters to lower power with small accuracy loss. Experiments show that compared to state-of-the-art AxMs, TRAM achieves up to 25.05% AxM power reduction on CNNs with CIFAR-10, and reduces power by up to 27.09% on vision transformers with ImageNet.

Problem

• approximate computing
• low-power AI accelerators
• approximate multipliers
• power consumption
• accuracy loss

Innovation

• approximate computing
• AI accelerators
• low-power design
• joint optimization
• approximate multiplier