🤖 AI Summary
Existing array computation redundancy elimination techniques for nested loops suffer from limited generality and difficulty in detecting complex structural redundancies. To address this, we propose a generic two-level redundancy identification framework: the first level employs linear traversal of expression trees combined with data-flow analysis to detect data reuse; the second level applies multi-strategy expression reassociation to uncover deep computational redundancies. This work introduces the first hierarchical detection paradigm, supporting arbitrary loop nesting depths and complex operator compositions, while automatically generating auxiliary array cache code. Experimental evaluation on standard benchmarks demonstrates that our method significantly improves redundancy coverage and detection generality, achieving an average 23.6% reduction in computational overhead, all while strictly preserving semantic correctness.
📝 Abstract
Redundancy elimination is a key optimization direction, and loop nests are the main optimization target in modern compilers. Previous work on redundancy elimination of array computations in loop nests lacks universality. These approaches either focus on specific computation patterns or fail to recognize redundancies with complex structures. This paper proposes RACE (Redundant Array Computation Elimination), a more general redundancy elimination technique. RACE utilizes a novel two-level scheme to identify the data reuse between array references and the computation redundancies between expressions. It traverses the expression trees in loop nests to detect redundancies hierarchically in linear time and generates efficient code with optimized auxiliary arrays that store redundant computation results. Furthermore, RACE supports the expression reassociation with various aggressive strategies to improve the redundancy opportunities. Experimental results demonstrate the effectiveness of RACE.