🤖 AI Summary
This work addresses the challenge of unsupervised anomaly detection in integrated circuit testing, where defect rates are extremely low, data are high-dimensional, and no anomaly labels are available. The authors introduce, for the first time, a diffusion transformer for wafer-level defect screening. Their approach employs an autoencoder to compress test data and constructs structured token sequences by integrating sinusoidal and wafer positional embeddings. Anomaly scores are derived from mid-stage noise prediction errors in the diffusion model, enabling interpretable defect localization without labeled data or manual feature engineering. Evaluated on industrial 16nm IC test data, the method achieves state-of-the-art performance under extreme class imbalance and accurately localizes failure regions through reconstruction residuals in the latent space.
📝 Abstract
Latent defect screening is challenged by extremely low failure rates, high-dimensional test data, and absence of labeled anomalies. We propose the first unsupervised anomaly detection framework incorporating a Diffusion Transformer. Raw test measurements are first compressed by an autoencoder, then reshaped into a structured token sequence enriched with sinusoidal and per-device wafer-position embeddings. Anomaly scores are derived from the noise-prediction error over mid-range diffusion timesteps, enabling fast wafer-scale screening without any labeled defects or manual feature engineering. Our approach achieves state-of-the-art performance on industrial 16nm IC test data under extreme class imbalance, offering interpretable failure localization through latent-space reconstruction residuals.