ReDIL-GNN: Resynthesis Domain Incremental Learning for Circuit Graph Neural Networks

2026-09-16

AI Summary

研究通过ReDIL-GNN框架解决电路图神经网络中的域迁移问题，利用Resynthesis Adaptability Index评估并选择合适的适应策略。

Abstract

Logic resynthesis preserves circuit functionality while changing gate vocabulary, topology, and structural statistics, creating domain shift for circuit graph neural networks (GNNs) without changing task labels. To study this setting, we introduce ReDIL-GNN, a resynthesis domain-incremental learning framework that adapts a fixed prediction or representation head as new synthesis styles arrive and evaluates retention on all previously observed domains. Because not every shift should be adapted blindly, ReDIL-GNN further introduces the Resynthesis Adaptability Index (RAI), a pre-adaptation score that combines adaptation need, source-equivalence recoverability, structural coverage, and update compatibility. We evaluate supervised hardware-security tasks and representation-learning models using task-native metrics for classifiers and source-equivalence retrieval metrics for embedding models, comparing naive fine-tuning with LwF, Online EWC, MAS, ER, A-GEM, DER++, ER+LwF, and equivalence-guided replay. Across the studied pipelines, RAI separates unsupported shifts from promising updates, ranging from 0.001 for a structurally uncovered GNN-RE ABC-rewrite shift to 0.824 for the best original-only GNN-RE adaptation case. In practice, ReDIL-GNN turns resynthesis-aware circuit learning into a deployment control loop: RAI screens each new synthesis flow before update, guiding whether to reuse the current model, apply retention-aware adaptation, or defer adaptation until the shift is better supported.

Problem

• circuit graph neural networks
• logic resynthesis
• domain shift
• incremental learning
• adaptability

Innovation

• Resynthesis Domain Incremental Learning
• Resynthesis Adaptability Index
• Circuit Graph Neural Networks
• Adaptation Need