NeuroCoreX: An Open-Source FPGA-Based Spiking Neural Network Emulator with On-Chip Learning

2025-06-17

AI Summary

Existing FPGA platforms for spiking neural networks (SNNs) suffer from limited flexibility, poor topological adaptability, and insufficient open-source support—particularly for co-design and on-chip learning. To address these challenges, this paper introduces NeuroCoreX, an open-source FPGA platform for SNNs. NeuroCoreX is the first FPGA implementation supporting fully connected, structure-agnostic SNN architectures with biologically inspired spike-timing-dependent plasticity (STDP) for on-chip learning, enabling non-regular topologies such as small-world networks. It employs leaky integrate-and-fire (LIF) neuron models and current-based synaptic modeling, and provides a UART configuration interface alongside a Python-based hardware-software co-development framework. The platform delivers programmability, low power consumption, and real-time SNN simulation capability, significantly improving design efficiency and energy efficiency. All source code and documentation are publicly released to advance neuromorphic computing research and education.

Technology Category

• Cognitive Modeling & Cognitive Systems: Neural Spike Coding
• Machine Learning: Hardware-aware ML
• Computer Vision: Learning & Optimization for CV

Application Category

• Systems and Infrastructure for Web, Mobile and WoT: Experiences and lessons learnt from Web-based algorithms and system deployments
• Graph Algorithms and Modeling for the Web: Graph neural networks and deep learning approaches for Web-related graphs
• Economics, Online Markets and Human Computation: Incentives in network design for Web infrastructures and ecosystems

Abstract

Spiking Neural Networks (SNNs) are computational models inspired by the structure and dynamics of biological neuronal networks. Their event-driven nature enables them to achieve high energy efficiency, particularly when deployed on neuromorphic hardware platforms. Unlike conventional Artificial Neural Networks (ANNs), which primarily rely on layered architectures, SNNs naturally support a wide range of connectivity patterns, from traditional layered structures to small-world graphs characterized by locally dense and globally sparse connections. In this work, we introduce NeuroCoreX, an FPGA-based emulator designed for the flexible co-design and testing of SNNs. NeuroCoreX supports all-to-all connectivity, providing the capability to implement diverse network topologies without architectural restrictions. It features a biologically motivated local learning mechanism based on Spike-Timing-Dependent Plasticity (STDP). The neuron model implemented within NeuroCoreX is the Leaky Integrate-and-Fire (LIF) model, with current-based synapses facilitating spike integration and transmission . A Universal Asynchronous Receiver-Transmitter (UART) interface is provided for programming and configuring the network parameters, including neuron, synapse, and learning rule settings. Users interact with the emulator through a simple Python-based interface, streamlining SNN deployment from model design to hardware execution. NeuroCoreX is released as an open-source framework, aiming to accelerate research and development in energy-efficient, biologically inspired computing.

Problem

• Develop FPGA-based emulator for flexible SNN co-design
• Support diverse SNN topologies without architectural restrictions
• Enable energy-efficient biologically inspired computing research

Innovation

• FPGA-based SNN emulator with on-chip learning
• Supports all-to-all connectivity and diverse topologies
• Uses STDP-based local learning and LIF neurons