🤖 AI Summary
To address the challenges of assessing non-shortest-path diversity in large-scale interconnection networks and the poor scalability of conventional packet-level simulators, this paper proposes a lightweight simulation framework tailored for extreme-scale networks. By identifying memory and event-scheduling bottlenecks in mainstream simulators, we introduce three core techniques: compact data structures, lazily bound event queues, and lock-free memory pools—significantly reducing both memory footprint and synchronization overhead. Our framework enables fine-grained, packet-level simulation of data center and HPC networks with over one million endpoints on a single commodity laptop, achieving a throughput of 10 million packets per second—three orders of magnitude higher than state-of-the-art shared-memory simulators. The open-source framework supports rapid prototyping and validation of novel interconnect protocols, providing a reproducible, high-fidelity foundation for path diversity analysis and performance optimization in ultra-large-scale networks.
📝 Abstract
The growing size of data center and HPC networks pose unprecedented requirements on the scalability of simulation infrastructure. The ability to simulate such large-scale interconnects on a simple PC would facilitate research efforts. Unfortunately, as we first show in this work, existing shared-memory packet-level simulators do not scale to the sizes of the largest networks considered today. We then illustrate a feasibility analysis and a set of enhancements that enable a simple packet-level htsim simulator to scale to the unprecedented simulation sizes on a single PC. Our code is available online and can be used to design novel schemes in the coming era of omnipresent data centers and HPC clusters.
