Mainframe-style channel controllers for modern disaggregated memory systems

2025-06-11

AI Summary

Current near-data processing (NDP) in disaggregated memory systems (e.g., CXL) lacks a unified OS-level abstraction, resulting in high programming complexity, poor portability, and limited virtualization support. Method: This paper introduces the Memory Channel Controller (MCC)—a mainframe-inspired OS kernel abstraction—that enables fully OS-centric, virtualizable NDP. Leveraging hardware cache coherence provided by modern interconnects like CXL, MCC supports fine-grained, semantically rich programming models without CPU microarchitectural modifications. Integration is achieved transparently via the kernel abstraction layer and existing virtualized I/O frameworks. Contribution/Results: MCC delivers the first industrially deployable, OS-level paradigm for disaggregated memory systems. Experiments demonstrate substantial improvements in application portability and developer productivity for NDP workloads, establishing a foundation for scalable, virtualized, and portable NDP deployment.

Technology Category

• Machine Learning: Hardware-aware ML
• Data Mining & Knowledge Management: Scalability, Parallel & Distributed Systems
• Multiagent Systems: Agent Communication

Application Category

• Systems and Infrastructure for Web, Mobile and WoT: Data management and stream processing for Web, mobile and wireless applications
• Security and Privacy: Large-scale security measurements
• User Modeling, Personalization and Recommendation: On-Device user modeling, personalization, and recommendation

Abstract

Despite the promise of alleviating the main memory bottleneck, and the existence of commercial hardware implementations, techniques for Near-Data Processing have seen relatively little real-world deployment. The idea has received renewed interest with the appearance of disaggregated or"far"memory, for example in the use of CXL memory pools. However, we argue that the lack of a clear OS-centric abstraction of Near-Data Processing is a major barrier to adoption of the technology. Inspired by the channel controllers which interface the CPU to disk drives in mainframe systems, we propose memory channel controllers as a convenient, portable, and virtualizable abstraction of Near-Data Processing for modern disaggregated memory systems. In addition to providing a clean abstraction that enables OS integration while requiring no changes to CPU architecture, memory channel controllers incorporate another key innovation: they exploit the cache coherence provided by emerging interconnects to provide a much richer programming model, with more fine-grained interaction, than has been possible with existing designs.

Problem

• Lack of OS-centric abstraction for Near-Data Processing
• Need for portable virtualizable abstraction in disaggregated memory
• Exploiting cache coherence for richer programming models

Innovation

• Memory channel controllers for disaggregated memory
• OS-centric abstraction for Near-Data Processing
• Cache coherence for rich programming model