🤖 AI Summary
This work addresses the growing impact of carbon emissions from semiconductor device manufacturing and operation as a critical constraint in system design. To tackle this challenge, the paper introduces Architecture Carbon Tool v3 (ACT3), an extensible and customizable sustainability-aware modeling platform that, for the first time, enables carbon-driven design space exploration for silicon-based system architectures. ACT3 significantly enhances modeling capabilities, curated datasets, and analytical telemetry by integrating electronic design automation with architectural modeling techniques, thereby establishing an end-to-end framework for carbon assessment and optimization. Case studies demonstrate that ACT3 effectively supports low-carbon architecture design, offering both a practical tool and novel research directions for sustainable computing systems.
📝 Abstract
As the carbon cost of manufacturing and operating semiconductor devices has come into sharper focus, sustainability has gradually emerged as a new system architecture design metric. Like power and performance modeling tools, enabling sustainability-aware silicon systems design and optimizations will require a new generation of electronic design automation and architectural modeling tools. Towards this end, we present an update to the Architecture Carbon Tool v3 (ACT3) which aims to provide an extensible and customizable modeling platform for research and advanced development to pave the path towards sustainability-aware architectural design space exploration. Compared to previous versions of ACT, ACT3 provides significantly richer modeling capabilities, enhanced collateral and analysis telemetry, and first order design space exploration capabilities. This technical brief provides an overview of these expanded capabilities and illustrates ACT3's basic utility across several case studies. Finally, we identify opportunities for research and development where we expect the research community can contribute towards continuing to improve sustainability modeling and design methodology for silicon systems.