Raiders of the Lost Log: Synchronous Parallel In-Place Models and Algorithms

2026-06-14

AI Summary

Existing synchronous parallel computation models struggle to rigorously guarantee in-place execution across arbitrary numbers of processors. This work proposes the Synchronous Parallel In-Place (Synchronous PIP) computation model, establishing for the first time a synchronous in-place parallel framework that scales to any processor count. By leveraging a parallel-enhanced scan technique and operating under strict constraints—requiring no additional shared memory and only constant-sized private memory per processor—the model enables efficient and strictly in-place algorithm execution. This contribution fills a critical theoretical gap in synchronous parallel computing regarding in-place guarantees and introduces a novel paradigm for designing highly efficient parallel algorithms in resource-constrained environments.

Abstract

Embedded systems and Internet of Things (IoT) applications motivate in-place parallel algorithms, which avoid allocating additional shared memory past the input. Work by Gu, Obeya, and Shun [APOCS '21] defines a family of PIP (parallel in-place) models and parallel algorithms that eschew auxiliary memory at high processor counts while remaining in-situ when run sequentially. However, their models assume asynchronous processing and have no in-place guarantees for intermediate processor counts. We address this gap in the literature by proposing a Synchronous PIP family of models for in-place parallel and distributed computation. We demonstrate the effectiveness of our new model by giving efficient and synchronous parallel algorithms in this model that require no auxiliary shared memory and only constant private memory per processor. Importantly, we show how to leverage a new parallel-augmented sweep technique to ensure that Synchronous PIP algorithms remain efficient and strictly in-place at all processor counts.

Problem

• synchronous parallel
• in-place algorithms
• parallel computation
• memory efficiency
• processor scalability

Innovation

• Synchronous PIP
• in-place parallel algorithms
• parallel-augmented sweep
• constant private memory
• no auxiliary shared memory