PANDA: An LLM-Enhanced Performance-Driven Analog Design Framework Bridging Design Intent and Layout Generation

2026-06-12

AI Summary

This work addresses the longstanding challenges in traditional analog circuit design, which heavily relies on manual effort across disconnected stages—topology selection, sizing, and layout—hindering holistic optimization. To overcome this, the authors propose PANDA, a novel framework that integrates large language models (LLMs) into end-to-end analog design automation, enabling direct translation of high-level design intent into final layout. PANDA uniquely captures cross-stage dependencies through guided topology synthesis, substructure-aware sizing, and constraint-driven layout generation, thereby shifting the design paradigm from algorithm-centric to intent-centric. Experimental results demonstrate that PANDA reduces design cycles from days or weeks to mere hours while significantly improving circuit performance.

Abstract

Traditional design of analog circuits heavily relies on manual interventions across topology, sizing, and layout, with prior automation addressing stages in isolation. In this work, we propose PANDA, an LLM-enhanced framework that bridges high-level design intent to final layout by actively managing cross-stage dependencies through guided topology synthesis, substructure-aware sizing, and constraint-driven layout generation. This shifts automation from algorithm-centric execution to intent-centric co-design, reducing turnaround time from days or weeks to hours while improving design performance.

Problem

• analog circuit design
• design automation
• cross-stage dependencies
• layout generation
• design intent

Innovation

• LLM-enhanced design
• intent-centric co-design
• topology synthesis
• constraint-driven layout
• analog circuit automation