On Thread Convergence

2026-07-13

AI Summary

This work addresses the problem of determining whether barrier placements in a control flow graph guarantee synchronization of all threads across every execution. To this end, it introduces the first formal definitions of convergent nodes, convergent edges, and well-synchronized programs, along with a novel set of branch-and-merge inference rules. By integrating path-sensitive information with thread divergence analysis, the paper presents a bidirectional, linear-time worklist algorithm that efficiently performs static analysis of synchronization regions. The proposed method significantly enhances the compiler’s ability to optimize barriers on warp-synchronous hardware, achieving both theoretical rigor and practical efficiency.

Abstract

We introduce a notion of convergence for the nodes and edges of a control-flow graph that captures whether a barrier placed at that location is guaranteed to synchronize all threads of a thread block in every execution. Convergence analysis lets a compiler determine when a barrier lies in a uniformly executed region and therefore avoid the code transformations otherwise required to implement thread-block barriers correctly on warp-synchronous hardware. We formalize convergent nodes, convergent edges, and well-synchronized programs; give two inference rules (a branch rule and a merge rule); and present a linear-time iterative work-list algorithm that propagates convergence information bidirectionally through the flow graph. We then describe refinements that improve precision using single-entry single-exit region information, path information, and thread-variance information.

Problem

• thread convergence
• control-flow graph
• barrier synchronization
• warp-synchronous hardware
• uniform execution

Innovation

• convergence analysis
• control-flow graph
• thread synchronization
• barrier optimization
• warp-synchronous hardware