🤖 AI Summary
This study investigates the existence and optimization of anchor-free approximate mutually unbiased bases (AMUBs) in high-dimensional Hilbert spaces, with a particular focus on whether more near-exact bases can be constructed in dimension six. We present the first reproducible optimization framework supporting multiple hardware backends—including CPU, Apple MPS, CUDA GPUs, and HPC systems—leveraging Lie algebra-based unitary parameterization and Taylor-series matrix exponential layers to efficiently explore AMUB configurations in arbitrary dimensions. Our key contributions include reproducing the exact three-basis solution, identifying a recurring “spoke–triangle” partially exact structure in four-basis settings, and experimentally validating the optimized unitaries on an IBM Heron quantum processor. Results indicate no near-exact pairs emerge for five or six bases, and quantum processing unit (QPU) experiments reveal that noise-induced losses (0.02–0.08) dominate, obscuring distinctions between classically near-exact and defective pairs.
📝 Abstract
We present a reproducible, parameter-driven software workflow for optimizing approximate mutually unbiased basis (AMUB) configurations in arbitrary dimensions d using a Lie-algebra unitary parameterization. The workflow is designed for portable execution across CPU, Apple MPS, CUDA-capable GPU, and HPC backends, using a Taylor-series matrix exponential layer as an accelerator compatibility pathway. As a dimension-six case study, we optimize unanchored configurations across 100 random seeds for basis counts n = 3, 4, 5, 6 in complex128 and complex64 arithmetic. The workflow recovers exact three-basis configurations, identifies a recurrent four-basis partial-exact hub-and-triangle structure, and finds no near-exact pairs for n = 5 or n = 6 in the reported campaigns under the primary tolerance. As a hardware-execution check, we embed the representative d = 6, n = 4 transition unitaries into three-qubit 8x8 unitaries and execute the resulting circuits on the 156-qubit Heron processor ibm-marrakesh using subspace post-selection. The measured QPU pairwise losses are dominated by a hardware and compilation noise floor of approximately 0.02-0.08, associated with compiled circuits averaging 37 native CZ gates, which obscures the distinction between classically near-exact and defective pairs. The results provide a reproducible computational framework for exploring AMUB landscapes, together with an initial assessment of the challenges involved in executing optimized dimension-six unitaries on current quantum hardware.