Modulation of switching dynamics in magnetic tunnel junctions for low-error-rate computational random-access memory

2025-05-20

AI Summary

To address the high logic bit error rate (BER) arising from magnetization switching dynamics of magnetic tunnel junctions (MTJs) in computational random-access memory (CRAM), this work proposes a novel voltage-controlled magnetic anisotropy (VCMA)-based approach to regulate MTJ switching kinetics. We introduce, for the first time, modulation of the switching probability transfer curve (SPTC) to suppress BER, while simultaneously leveraging VCMA to enhance tunneling magnetoresistance (TMR) gain—thereby unifying error suppression and energy efficiency optimization. Under a VCMA coefficient of 200 fJ·V⁻¹·m⁻¹, the logic BER is reduced by 61.43%, with concurrent reductions in logic supply voltage and energy consumption. Moreover, BER improvement accelerates with increasing TMR. This study provides a scalable, device-level solution enabling high-reliability, low-power in-memory computing hardware for AI applications.

Technology Category

• Machine Learning: Hardware-aware ML
• Cognitive Modeling & Cognitive Systems: Computational Creativity
• Computer Vision: Learning & Optimization for CV

Application Category

• Search and Retrieval-Augmented AI: Vertical and domain-specific search
• Graph Algorithms and Modeling for the Web: Efficient manipulation of static and dynamic Web-related graphs
• Security and Privacy: Privacy-enhancing technologies

Abstract

The conventional computer architecture has been facing challenges answering the ever-increasing demands from emerging applications, such as AI, for energy-efficient computation and memory hardware systems. Computational Random Access Memory (CRAM) represents a true in-memory computing paradigm that integrates logic and memory functions within the same array. At its core, CRAM relies on Magnetic Tunnel Junctions (MTJs), which serve as the foundational building blocks for implementing both memory storage and logic operations. However, a key challenge in CRAM lies in the non-ideal error rates associated with switching dynamics of MTJs, necessitating innovative approaches to reduce errors and optimize logic margins. This work demonstrates a technique of utilizing the voltage-controlled magnetic anisotropy (VCMA) to steepen the switching probability transfer curve (SPTC), thereby significantly reducing the logic operation error rate in CRAM. Using several numerical modeling tools, we validate the effectiveness of VCMA in modulating the energy barrier and switching dynamics in MTJs. It is revealed that the VCMA effect significantly reduces the error rate of CRAM by 61.43% at a VCMA coefficient of 200 fJ V-1 m-1 compared to CRAM without VCMA. The reduction of error rate is further rapidly amplified with an increasing TMR ratio. Furthermore, the introduction of the VCMA effect decreases the logic voltage (Vlogic) required for logic operations in CRAM and results in reduction of energy consumption. Our work serves as a first exploration reducing the error rate in CRAM by modifying SPTC in MTJs.

Problem

• Reducing error rates in CRAM via MTJ switching dynamics modulation
• Optimizing logic margins using voltage-controlled magnetic anisotropy
• Lowering energy consumption by decreasing required logic voltage

Innovation

• Utilizes VCMA to steepen switching probability curve
• Reduces CRAM error rate by 61.43%
• Decreases logic voltage and energy consumption