RIVERPlace: Repairing Interconnect Violations with Efficient Retiming and Incremental Placement for AQFP Circuits

2026-08-13

AI Summary

This study addresses interconnect violations and scalability challenges in AQFP circuits caused by path balancing and fanout limitations. We propose RIVERPlace, a framework integrating long-wire pipelining, placement-aware retiming, and incremental placement. Innovatively, this method formulates violation repair as a polynomial-time solvable maximum topological cut problem via buffer-cut insertion, enabling precise, low-overhead optimization. Experimental results demonstrate that, compared to state-of-the-art methods, RIVERPlace reduces buffer insertion by over an order of magnitude, decreases depth by 3×, halves area, accelerates runtime by over 10×, and lowers latency by 38%. Notably, it achieves the first timing-closed post-routing for the complete open-source AQFP benchmark suite, significantly advancing the practical deployability of AQFP technology.

Abstract

The Adiabatic Quantum-Flux-Parametron (AQFP) offers near-Landauer-limit energy efficiency but faces significant scalability challenges due to strict path balancing and limited drive strength. To address this, we propose RIVERPlace, a framework that integrates long-wire pipelining, retiming, and incremental placement to resolve interconnect violations with minimal disruption. RIVERPlace first applies placement-aware retiming to repair violations without increasing logical depth. When depth increases are necessary, we introduce Buffer Cut Insertion (BCI), which formulates violation resolution as a constrained global edge-selection problem reducible to a maximum topological cut, thereby enabling an exact polynomial-time solution. By selectively pipelining edges across multiple rows, BCI avoids excessive buffer insertion while resolving interconnect violations. Experimental results demonstrate that RIVERPlace consistently outperforms prior AQFP placement approaches, reducing placement overhead by more than an order of magnitude in inserted buffers, 3x in placement-induced depth, and over 2x in circuit area, while also reducing runtime by more than an order of magnitude and latency by 38%. These improvements enable the first post-routing, timing-closed implementations of the complete open-source AQFP benchmark suite, including larger circuits like alu32.

Problem

• AQFP
• Interconnect Violations
• Path Balancing
• Scalability
• Drive Strength

Innovation

• AQFP
• Incremental Placement
• Retiming
• Buffer Cut Insertion
• Maximum Topological Cut