ThermoDSE: A Thermal-Aware and Comprehensive Design Space Exploration for Chiplet-Based DNN Accelerators

2026-07-08

AI Summary

This work addresses the challenge of jointly optimizing architecture, task scheduling, and inter-chiplet communication for chiplet-based DNN accelerators under stringent area and thermal constraints. The authors propose ThermoDSE, a thermal-aware design space exploration framework that, for the first time, integrates fine-grained task modeling, chiplet- and core-level architectural design, communication mechanisms, and rigorous thermal-area constraints into a unified optimization flow to simultaneously maximize energy efficiency, minimize latency, and improve yield. Experimental results demonstrate that ThermoDSE achieves a 3.5× improvement over baseline architectures such as Simba in terms of the Energy-Delay-Inverse-Yield metric, while accelerating the design space exploration process by 3.7× and 29.4× compared to simulated annealing and reinforcement learning approaches, respectively.

Abstract

Chiplet-based DNN accelerators provide a scalable path to balance performance and yield for modern AI workloads. However, such systems face critical challenges in area and thermal constraints. Design space optimization should jointly consider fine-grained task modeling, chiplet granularity, core granularity, and critical physical constraints. To the best of our knowledge, this is the first framework that involves all these factors. In this work, we propose ThermoDSE, a thermal-aware and comprehensive design space exploration framework for chiplet-based DNN accelerators. ThermoDSE integrates existing fine-grained modeling techniques into a unified simulation and optimization framework that jointly considers architecture design, task orchestration, and inter-chiplet communication under strict thermal and area constraints. Experimental results show that ThermoDSE achieves up to 3.5x improvement in Energy-Delay-Inverse-Yield, defined as E times D times inverse Y, compared with state-of-the-art Simba and other baselines. Furthermore, relative to simulated annealing and reinforcement learning-based methods, ThermoDSE converges to better design points with 3.7x and 29.4x runtime speedups, respectively.

Problem

• chiplet-based DNN accelerators
• thermal constraints
• area constraints
• design space exploration
• physical constraints

Innovation

• Chiplet-based DNN accelerators
• Thermal-aware design
• Design space exploration
• Fine-grained modeling
• Energy-Delay-Inverse-Yield