MiLSD: A Micro Line-Segment Detector for Resource-Constrained Devices

2026-07-06

AI Summary

This work addresses the challenge of deploying deep learning–based line segment detectors on microcontroller units (MCUs), where high memory consumption hinders practical application. To overcome this limitation, the authors propose MiLSD, a miniature line segment detector capable of efficient and accurate detection within a memory budget of less than 1 MB. The method integrates a compact fully convolutional backbone, 8/4-bit quantization, sub-pixel decoding, and lightweight post-processing. A key innovation is the F-Clip representation, which encodes line segments via center, length, and angle parameters, significantly enhancing learning efficacy at extremely small model scales. The study also presents the first systematic analysis of the trade-off between accuracy and memory usage in embedded line segment detection. Evaluated on the ShanghaiTech Wireframe dataset, MiLSD improves sAP10 from 10.6 to 24.1 with only 25k parameters while maintaining memory consumption under 1 MB.

Abstract

Line segment detection is a key building block in visual SLAM, 3D reconstruction, and industrial inspection. Recent deep learning methods have greatly improved accuracy, yet even the smallest models require several megabytes of memory, exceeding low-cost MCU capacity. This work investigates the maximum achievable accuracy under a sub-megabyte budget. We propose MiLSD, a detector tailored for MCU-level constraints, and systematically compare three output representations within a compact fully-convolutional backbone. Our study shows that the proposed F-Clip center-with-length-and-angle formulation learns most effectively at small model sizes. We find that 8-bit quantization preserves full-precision performance, while 4-bit quantization causes significant degradation, particularly in angle regression, with quantization-aware training recovering only part of the loss. With a one-megabyte activation budget and inference enhancements including sub-pixel decoding, test-time augmentation, and a lightweight verifier, MiLSD improves sAP10 on ShanghaiTech Wireframe from 10.6 (25k parameters, 0.25 MB) to 24.1 within 1 MB. Rather than competing with GPU-scale parsers, we map the accuracy memory trade-off across representations, bit-widths, capacities, and post-processing strategies for embedded vision systems.

Problem

• line segment detection
• resource-constrained devices
• memory budget
• embedded vision
• quantization

Innovation

• MiLSD
• line segment detection
• resource-constrained devices
• quantization
• compact representation