FlexSpIM: An Event-Based Digital Compute-In-Memory Accelerator with Flexible Operand Resolution and Layer-Wise Hybrid Stationarity

📅 2026-09-08
📈 Citations: 0
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🤖 AI Summary
本文提出FlexSpIM,一种支持任意操作数分辨率和形状的数字计算内存架构,通过混合数据流减少能耗和延迟,提高SNN在边缘视觉应用中的效率。
📝 Abstract
Compute-in-memory (CIM) accelerators for spiking neural networks (SNNs) offer a promising solution for achieving $\mu$s-level inference latency and ultra-low energy in edge vision applications. However, their limited flexibility at both circuit and system levels restricts their deployment across diverse workloads. This work introduces FlexSpIM, a digital CIM architecture supporting arbitrary operand resolution and shape within a unified storage for weights and neuron states (i.e., membrane potentials). These circuit-level capabilities enable a layer-level hybrid weight- and output-stationary dataflow, maximizing operand reuse and reducing costly on- and off-chip data movement during SNN execution. Measurement results from a fabricated FlexSpIM prototype in 40-nm CMOS demonstrate competitive 1-bit-normalized energy efficiency and higher throughput compared with prior fixed-precision digital CIM-based SNN accelerators, while providing bitwise resolution reconfiguration. Evaluated on the IBM DVS gesture dataset, FlexSpIM achieves 95.8% accuracy while enabling up to 45% energy and 52% latency reductions in large-scale systems compared with fixed stationarity approaches.
Problem

Research questions and friction points this paper is trying to address.

Compute-in-memory
spiking neural networks
flexibility
workloads
Innovation

Methods, ideas, or system contributions that make the work stand out.

Compute-in-memory
Flexible Operand Resolution
Hybrid Stationarity
SNN Accelerators
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Nicolas Chauvaux
Department of Microelectronics, Delft University of Technology, 2628 CD Delft, The Netherlands
A
Adrian Kneip
Department of Microelectronics, Delft University of Technology, 2628 CD Delft, The Netherlands, and Department of Electrical Engineering, KU Leuven, 3001 Leuven, Belgium
Charlotte Frenkel
Charlotte Frenkel
Assistant Professor, Delft University of Technology
Neuromorphic engineeringHardware/algorithm co-designNeuroAIOn-chip learningIntegrated circuits