Mapping Dynamic, Hierarchical Quantum Circuits

2026-09-08

AI Summary

本文提出一种新的量子比特映射方法，通过处理分层动态电路来解决现有映射器对一维表示的依赖问题，并在多种架构上显著提高了SWAP数、电路深度、延迟和错误率等方面的性能。

Abstract

Qubit mapping is a critical pass in quantum compilation. Despite various advances, dynamic circuits, those exhibiting data dependent control-flow, often resulting from qubit measurements, are not yet supported by the vast majority of available qubit mappers. The crucial limitation to overcome is the dependence on flat, one-dimensional representations of circuits. Further, qubit mappers currently lack compiler abstractions that capture the hierarchical nature of circuits, hindering the qubit mapping process. In this paper, 1 we introduce a new qubit mapping method and analyses to tackle hierarchical dynamic circuits. Our novelty resides in four key aspects: modeling (statically) sub-circuits in disjoint control-flow paths, introducing a novel Qubit Reconciliation pass to maintain consistency between sub-circuit and control-flow boundaries, a loop-entry remapping pass, and a refined cost function enhanced for SWAP count, circuit depth, circuit latency and error. We demonstrate the efficiency of our approach on a wide range of dynamic circuits on two monolithic Quantum Processing Units of 127 and 156 qubits, and on chiplet hexagon-based QPUs. On monolithic QPUs, our qubit mapper improves the SWAP count by up to 52%, depth by up to 18%, latency by up to 18.6%, and error by up to 40%. On chiplet architectures, we achieve improvements of up to 36% on SWAP count, 8.7% on depth, 15% on latency, and 15% of error.

Problem

• qubit mapping
• dynamic circuits
• hierarchical circuits
• control-flow

Innovation

• Qubit Mapping
• Hierarchical Dynamic Circuits
• Qubit Reconciliation
• Cost Function Optimization
• Control-Flow Path