A PVT-Resilient Subthreshold SRAM-Based In-Memory Computing Accelerator with In-Situ Regulation for Energy-Efficient Spiking Neural Networks

2026-04-30

AI Summary

This work addresses the poor robustness, low energy efficiency, and limited scalability of subthreshold in-memory computing-based spiking neural network (SNN) accelerators under process–voltage–temperature (PVT) variations. To overcome these challenges, the authors present a 28-nm CMOS subthreshold SRAM in-memory computing macro that innovatively integrates on-chip in-situ current sensing with a distributed voltage regulation mechanism, enabling robust large-scale current-domain computation. Additionally, the design incorporates memory-cell-based programmable neuronal firing thresholds and a stride-tick batched scheduling strategy, which significantly enhance data reuse and reduce buffer overhead. Evaluated on a keyword spotting task, the system achieves 93.64% accuracy, an energy efficiency of 1181.42 TOPS/W, and an area efficiency of 7.24 TOPS/mm², demonstrating its feasibility for efficient edge deployment of SNNs.

Abstract

This paper presents a PVT-resilient, subthreshold SRAM-based computing-in-memory (CIM) macro tailored for energy-efficient spiking neural networks (SNNs). The macro integrates in-situ current sensors and distributed voltage regulators to enable robust large-scale (1024 wordlines, 1304 bitlines and 128 shared neuron cells) subthreshold current-mode CIM, mitigating energy overheads and process-voltage-temperature (PVT) sensitivity. The neuron cells adopt a programmable, memory cell-based firing threshold to enhance neuron robustness against PVT variations. The architecture uses a stride-tick batching schedule to significantly reduce buffer overhead with enhanced input data reuse. Exploiting the high sparsity of SNNs, the proposed system demonstrates significant improvements in energy efficiency and variation tolerance. Fabricated in 28-nm CMOS, the prototype attains 93.64\% accuracy on keyword spotting, delivers up to 1181.42 TOPS/W, and achieves 7.24 TOPS/mm^2, demonstrating a viable and efficient solution for high-performance edge SNN processing.

Problem

• PVT variation
• subthreshold SRAM
• spiking neural networks
• computing-in-memory
• energy efficiency

Innovation

• PVT-resilient
• subthreshold SRAM
• in-memory computing
• spiking neural networks
• in-situ regulation