Autoformalizing Memory Specifications with Agents

2026-04-29

AI Summary

This work addresses the error-prone and labor-intensive process of manually translating natural language specifications into formal representations for chip design verification. It presents the first end-to-end agent framework capable of automatically converting industrial-grade DRAM standard specifications from natural language into the domain-specific language DRAMPyML, which is then seamlessly integrated into hardware verification workflows to generate SystemVerilog assertions, stimuli, and functional coverage metrics. The approach is validated on real-world DRAM specifications, supported by a newly constructed evaluation benchmark, DRAMBench, and an open-sourced dataset to advance research in automated formalization of hardware specifications.

Abstract

The primary goal of Design Verification (DV) is to ensure that a proposed chip design implementation (either in code, or physical form) exactly matches its specification and is free of functional errors in order to avoid costly re-designs. Achieving this often demands extensive manual interpretation, translating the specification document into a formal, testable representation. While AI has made progress in DV, current approaches typically focus on narrow, isolated tasks rather than full end-to-end specification compliance of modern chip designs, failing to capture the complexity of real-world verification. Our method automatically formalizes natural language memory chip specifications, for industry relevant Dynamic Random Access Memory (DRAM) standards, into a formal representation called DRAMPyML that can be used for downstream DV tasks like the generation of SystemVerilog assertions, stimulus, and functional coverage. We also release our benchmarking dataset, DRAMBench, which can be used to evaluate the evolution of model capabilities (and new approaches) at hardware autoformalization.

Problem

• autoformalization
• memory specifications
• Design Verification
• DRAM
• natural language to formal specification

Innovation

• autoformalization
• design verification
• DRAM specification
• agent-based formalization
• DRAMPyML