Mixed Structural Choice Operator: Enhancing Technology Mapping with Heterogeneous Representations

2025-04-17

AI Summary

The decoupling of logic optimization and technology mapping in logic synthesis introduces structural bias; conventional approaches, constrained by technology-agnostic optimization, struggle to escape local optima. Method: This paper proposes the Mixed-Structure Choice (MCH) framework—the first to jointly model heterogeneous logic representations (e.g., AIGs and XMGs), tightly coupling multi-representation candidate generation with technology-aware global cost evaluation, enabling co-optimization for both LUT-based FPGA and ASIC implementations. It employs dynamic candidate caching and a multi-objective search algorithm to achieve end-to-end, technology-aware joint optimization. Contribution/Results: Experiments demonstrate that MCH establishes new state-of-the-art results on the EPFL benchmark for LUT mapping; for ASIC mapping, it achieves average reductions of 3.73% in area and 8.94% in delay; under delay-driven and area-driven modes, it improves performance by 20.35% and 21.02%, respectively.

Technology Category

• Search and Optimization: Mixed Discrete/Continuous Search
• Constraint Satisfaction and Optimization: Mixed Discrete/Continuous Optimization
• Machine Learning: Optimization

Application Category

• Economics, Online Markets and Human Computation: Incentives in network design for Web infrastructures and ecosystems
• Systems and Infrastructure for Web, Mobile and WoT: Applied ML and AI for Web-based mobile applications
• Graph Algorithms and Modeling for the Web: Foundation models and LLMs for Web-related graphs

Abstract

The independence of logic optimization and technology mapping poses a significant challenge in achieving high-quality synthesis results. Recent studies have improved optimization outcomes through collaborative optimization of multiple logic representations and have improved structural bias through structural choices. However, these methods still rely on technology-independent optimization and fail to truly resolve structural bias issues. This paper proposes a scalable and efficient framework based on Mixed Structural Choices (MCH). This is a novel heterogeneous mapping method that combines multiple logic representations with technology-aware optimization. MCH flexibly integrates different logic representations and stores candidates for various optimization strategies. By comprehensively evaluating the technology costs of these candidates, it enhances technology mapping and addresses structural bias issues in logic synthesis. Notably, the MCH-based lookup table (LUT) mapping algorithm set new records in the EPFL Best Results Challenge by combining the structural strengths of both And-Inverter Graph (AIG) and XOR-Majority Graph (XMG) logic representations. Additionally, MCH-based ASIC technology mapping achieves a 3.73% area and 8.94% delay reduction (balanced), 20.35% delay reduction (delay-oriented), and 21.02% area reduction (area-oriented), outperforming traditional structural choice methods. Furthermore, MCH-based logic optimization utilizes diverse structures to surpass local optima and achieve better results.

Problem

• Resolving structural bias in logic synthesis
• Combining multiple logic representations for optimization
• Improving technology mapping efficiency and scalability

Innovation

• Combines multiple logic representations with technology-aware optimization
• Flexibly integrates different logic representations and optimization strategies
• Enhances technology mapping by evaluating technology costs comprehensively