TinyIceNet: Low-Power SAR Sea Ice Segmentation for On-Board FPGA Inference

2026-03-03

AI Summary

This work addresses the challenges of bandwidth limitation, high latency, and excessive energy consumption in on-orbit processing of synthetic aperture radar (SAR) data over polar regions by proposing TinyIceNet, a lightweight semantic segmentation network tailored for spaceborne FPGA implementation. Designed for real-time stage-of-development (SOD) sea ice segmentation from dual-polarization Sentinel-1 SAR imagery, TinyIceNet leverages hardware-algorithm co-design through a SAR-aware compact architecture, low-bit quantization, and high-level synthesis (HLS) for efficient deployment on the Xilinx Zynq UltraScale+ platform. Evaluated on the AI4Arctic dataset, the model achieves an F1 score of 75.216%, reducing energy consumption by a factor of two compared to a full-precision GPU baseline. This study demonstrates, for the first time, the feasibility of low-power, near-real-time on-board generation of SAR-derived sea ice products.

Technology Category

• Machine Learning: Hardware-aware ML
• Computer Vision: Remote Sensing / Geospatial AI
• Planning, Routing, and Scheduling: Optimization of Spatio-temporal Systems

Application Category

• Systems and Infrastructure for Web, Mobile and WoT: Data management and stream processing for Web, mobile and wireless applications
• Search and Retrieval-Augmented AI: Vertical and domain-specific search
• User Modeling, Personalization and Recommendation: On-Device user modeling, personalization, and recommendation

Abstract

Accurate sea ice mapping is essential for safe maritime navigation in polar regions, where rapidly changing ice conditions require timely and reliable information. While Sentinel-1 Synthetic Aperture Radar (SAR) provides high-resolution, all-weather observations of sea ice, conventional ground-based processing is limited by downlink bandwidth, latency, and energy costs associated with transmitting large volumes of raw data. On-board processing, enabled by dedicated inference chips integrated directly within the satellite payload, offers a transformative alternative by generating actionable sea ice products in orbit. In this context, we present TinyIceNet, a compact semantic segmentation network co-designed for on-board Stage of Development (SOD) mapping from dual-polarized Sentinel-1 SAR imagery under strict hardware and power constraints. Trained on the AI4Arctic dataset, TinyIceNet combines SAR-aware architectural simplifications with low-precision quantization to balance accuracy and efficiency. The model is synthesized using High-Level Synthesis and deployed on a Xilinx Zynq UltraScale+ FPGA platform, demonstrating near-real-time inference with significantly reduced energy consumption. Experimental results show that TinyIceNet achieves 75.216% F1 score on SOD segmentation while reducing energy consumption by 2x compared to full-precision GPU baselines, underscoring the potential of chip-level hardware-algorithm co-design for future spaceborne and edge AI systems.

Problem

• sea ice segmentation
• on-board processing
• SAR imagery
• energy efficiency
• downlink bandwidth

Innovation

• TinyIceNet
• on-board inference
• FPGA
• low-power AI
• SAR sea ice segmentation