Learning Cache Coherence Traffic for NoC Routing Design

2025-04-05

AI Summary

Existing NoC routing designs for multicore systems overlook cache-coherence traffic, leading to inaccurate performance evaluation. To address this, this paper proposes the first coherence-aware co-optimization framework for routing and topology in NoCs. We introduce the Cache Coherence Traffic Analyzer (CCTA), a novel tool that accurately models coherence traffic under protocols such as MESI. Our framework integrates a traffic-learning-driven dynamic routing algorithm, protocol-aware adaptive topology selection, and a joint latency-energy optimization mechanism. Evaluated on standard benchmarks, our approach reduces packet latency by 10.52%, accelerates application execution time by 55.51%, and cuts total energy consumption by 49.02% over baseline methods. This work pioneers the deep integration of coherence communication modeling into joint NoC routing and topology design—enabling significant improvements in both system energy efficiency and real-time performance.

Technology Category

• Planning, Routing, and Scheduling: Optimization of Spatio-temporal Systems
• Search and Optimization: Evaluation and Analysis
• Constraint Satisfaction and Optimization: Distributed CSP/Optimization

Application Category

• Systems and Infrastructure for Web, Mobile and WoT: Web performance, measurement, and characterization
• Economics, Online Markets and Human Computation: Incentives in network design for Web infrastructures and ecosystems
• Security and Privacy: Large-scale security measurements

Abstract

The rapid growth of multi-core systems highlights the need for efficient Network-on-Chip (NoC) design to ensure seamless communication. Cache coherence, essential for data consistency, substantially reduces task computation time by enabling data sharing among caches. As a result, routing serves two roles: facilitating data sharing (influenced by topology) and managing NoC-level communication. However, cache coherence is often overlooked in routing, causing mismatches between design expectations and evaluation outcomes. Two main challenges are the lack of specialized tools to assess cache coherence's impact and the neglect of topology selection in routing. In this work, we propose a cache coherence-aware routing approach with integrated topology selection, guided by our Cache Coherence Traffic Analyzer (CCTA). Our method achieves up to 10.52% lower packet latency, 55.51% faster execution time, and 49.02% total energy savings, underscoring the critical role of cache coherence in NoC design and enabling effective co-design.

Problem

• Addressing cache coherence neglect in NoC routing design
• Lack of tools to analyze cache coherence traffic impact
• Integrating topology selection with coherence-aware routing optimization

Innovation

• Cache coherence-aware routing approach
• Integrated topology selection method
• Cache Coherence Traffic Analyzer (CCTA)