🤖 AI Summary
This work addresses the high power and area overhead of conventional analog-to-stochastic signal conversion, which typically requires two separate stages—analog-to-digital followed by digital-to-stochastic—rendering it unsuitable for energy-efficient vision chips. To overcome this limitation, the study proposes a novel single-step direct conversion approach leveraging the intrinsic probabilistic switching behavior of magnetic tunnel junctions (MTJs). This method significantly reduces hardware complexity and improves energy efficiency. Furthermore, to mitigate the impact of MTJ resistance variability, a compensation mechanism is introduced to enhance conversion accuracy and robustness. Mixed-mode NS-SPICE simulations based on 90 nm CMOS and 100 nm MTJ technologies demonstrate the proposed circuit’s advantages in terms of reduced area, lower power consumption, and improved tolerance to device variations.
📝 Abstract
This paper introduces an analog-to-stochastic converter using a magnetic tunnel junction (MTJ) device for vision chips based on stochastic computation. Stochastic computation has been recently exploited for area-efficient hardware implementation, such as low-density parity-check decoders and image processors. However, power-and-area hungry two-step (analog-to-digital and digital-to-stochastic) converters are required for the analog to stochastic signal conversion. To realize a one-step conversion, an MTJ device is used as it inherently exhibits a probabilistic switching behavior between two resistance states. Exploiting the device-based probabilistic behavior, analog signals can be directly and area efficiently converted to stochastic signals to mitigate the signal-conversion overhead. The analog-to-stochastic signal conversion is theoretically described and the conversion characteristic is evaluated using device and circuit parameters. In addition, the resistance variability of the MTJ device is considered in order to compensate the variability effect on the signal conversion. Based on the theoretical analysis, the analog-to-stochastic converter is designed in 90-nm CMOS and 100-nm MTJ technologies and is verified using a SPICE simulator (NS-SPICE) that handles both transistors and MTJ devices.