🤖 AI Summary
In large-scale gate-level netlist reverse engineering, existing approaches suffer from low efficiency in state register identification and difficulty in accurately distinguishing control from data signals. To address these challenges, this paper proposes an end-to-end graph neural network (GNN)-based method. We introduce the first structured graph representation of register paths, jointly encoding node attributes—including gate types and fan-in/fan-out degrees—with topological relationships to learn discriminative representations for fine-grained register-type classification. Unlike conventional topology-matching methods, our approach avoids prohibitive computational overhead while achieving 100% recall, 30.49% precision, and 88.37% accuracy—demonstrating substantial improvements in robustness and scalability. The method establishes a novel, interpretable, and generalizable graph-learning paradigm for functional netlist analysis.
📝 Abstract
Reverse engineering of gate-level netlist is critical for Hardware Trojans detection and Design Piracy counteracting. The primary task of gate-level reverse engineering is to separate the control and data signals from the netlist, which is mainly realized by identifying state registers with topological comparison.However, these methods become inefficient for large scale netlist. In this work, we propose RELIC-GNN, a graph neural network based state registers identification method, to address these issues. RELIC-GNN models the path structure of register as a graph and generates corresponding representation by considering node attributes and graph structure during training. The trained GNN model could be adopted to find the registers type very efficiently. Experimental results show that RELIC-GNN could achieve 100% in recall, 30.49% in precision and 88.37% in accuracy on average across different designs, which obtains significant improvements than previous approaches.