NLS: Natural-Level Synthesis for Hardware Implementation Through GenAI

2025-03-28

AI Summary

In hardware development, algorithm/application engineers typically engage only during the requirements phase, limiting their involvement in subsequent design stages. To address this, we propose Natural-Language Synthesis (NLS), a generative-AI–driven, end-to-end methodology that translates natural language specifications directly into synthesizable HDL code, supporting both system-level and component-level hardware descriptions. NLS introduces the first NL→HDL paradigm tailored for full-flow EDA toolchains and implements the first VS Code plugin framework integrating AI-assisted coding with post-synthesis PPA (Power, Performance, Area) evaluation—enabling true AI-in-the-loop co-development. Evaluated across multiple case studies, NLS significantly lowers the barrier to HDL development, accelerates system-level hardware modeling, and demonstrates measurable improvements in resource efficiency. Our open, reproducible implementation establishes a foundational, practical basis for AI-augmented EDA toolchains.

Technology Category

• Natural Language Processing: Code Generation / Program Synthesis from Natural Language
• Machine Learning: Hardware-aware ML
• Humans and AI: Human-in-the-loop Machine Learning

Application Category

• Economics, Online Markets and Human Computation: Economic ramifications for generative AI infrastructure and applications
• Systems and Infrastructure for Web, Mobile and WoT: Applied ML and AI for Web-based mobile applications
• Social Networks and Social Media: Generative AI / large language models and their impact on social systems

Abstract

This paper introduces Natural-Level Synthesis, an innovative approach for generating hardware using generative artificial intelligence on both the system level and component-level. NLS bridges a gap in current hardware development processes, where algorithm and application engineers' involvement typically ends at the requirements stage. With NLS, engineers can participate more deeply in the development, synthesis, and test stages by using Gen-AI models to convert natural language descriptions directly into Hardware Description Language code. This approach not only streamlines hardware development but also improves accessibility, fostering a collaborative workflow between hardware and algorithm engineers. We developed the NLS tool to facilitate natural language-driven HDL synthesis, enabling rapid generation of system-level HDL designs while significantly reducing development complexity. Evaluated through case studies and benchmarks using Performance, Power, and Area metrics, NLS shows its potential to enhance resource efficiency in hardware development. This work provides a extensible, efficient solution for hardware synthesis and establishes a Visual Studio Code Extension to assess Gen-AI-driven HDL generation and system integration, laying a foundation for future AI-enhanced and AI-in-the-loop Electronic Design Automation tools.

Problem

• Bridging gap between algorithm engineers and hardware development stages
• Converting natural language to Hardware Description Language via Gen-AI
• Enhancing resource efficiency in hardware design through AI-driven synthesis

Innovation

• Gen-AI converts natural language to HDL
• NLS tool enables rapid HDL design
• Visual Studio Code Extension for Gen-AI