🤖 AI Summary
This work addresses the challenges posed by long-term retention memory (LtRAM)—including asymmetric read/write latencies, limited endurance, and coarse write granularity—by proposing an application-read-only memory (AROM) paradigm that shifts LtRAM management from hardware to the operating system. Under this approach, applications can only read from LtRAM; write attempts trigger page faults, prompting the kernel to migrate the target page back to DRAM via copy-on-write (CoW) before performing the write. By eliminating the need for a hardware translation layer that emulates DRAM interfaces, this design significantly simplifies LtRAM controller complexity. The method achieves near-DRAM performance for read-dominated workloads while preserving LtRAM’s high density and cost efficiency.
📝 Abstract
Alongside power, DRAM has become a major limiting factor in datacenter growth. As DRAM's cost-per-bit has plateaued over the past decade, a class of emerging memory technologies, called Long-term RAM (LtRAM), offers a path to denser and cheaper main memory.
However, LtRAM has three main drawbacks: asymmetric read/write latencies, limited endurance, and coarse write granularity. In an attempt to isolate software from these drawbacks, LtRAM technologies such as Intel Optane copy an approach from flash devices and introduce a translation layer that manages wear-leveling, address remapping, and read/write caching. Prior experimental studies have found these operations add significantly to LtRAM latency.
Rather than making LtRAM look like DRAM, we propose redesigning the hardware/software interface to offload more responsibility to the operating system. This design hinges on one central property, Application Read-Only Memory (AROM): LtRAM pages are read-only to applications and written only by the OS during page migrations. AROM is enforced by leveraging copy-on-write (CoW): application writes to LtRAM trigger a fault that migrates the page back to DRAM before the store is applied. This invariant allows us to shift LtRAM management from the on-DIMM controller to the operating system, drastically simplifying the DIMM's hardware. With this approach, we aim to match the performance of pure DRAM on read-mostly workloads while delivering LtRAM's density and cost advantages.