Analog Error Correcting Codes with Constant Redundancy
🤖 AI Summary
This work addresses the need for fault tolerance in analog vector-matrix multiplication by investigating analog error-correcting codes based on parity-check matrices whose columns have unit Euclidean norm. The authors propose an efficient decoding algorithm capable of correcting single errors and, for the first time, construct single-error-correcting codes with constant redundancy equal to three for arbitrary code lengths. This construction maintains constant redundancy while significantly reducing the height profile compared to existing maximum distance separable (MDS) schemes, thereby enhancing error detection and correction capabilities in analog computing systems.
Application Category
📝 Abstract
Analog error-correcting codes (analog ECCs) introduced by Roth are designed to correct outlying errors arising in analog implementations of vector-matrix multiplication. The error-detection/correction capability of an analog ECC can be characterized by its height profile, which is expected to be as small as possible. In this paper, we consider analog ECCs whose parity check matrix has columns of unit Euclidean norm. We first present an upper bound on the height profile of such codes as well as a simple decoder for correcting a single error. We then construct a family of single error-correcting analog ECCs with redundancy three for any code length, which has smaller height profile compared to the known MDS constructions.
Problem
Research questions and friction points this paper is trying to address.
analog error-correcting codes
outlying errors
height profile
vector-matrix multiplication
constant redundancy
Innovation
Methods, ideas, or system contributions that make the work stand out.
analog error-correcting codes
constant redundancy
height profile
single error correction
unit-norm parity check matrix
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