NuRedact: Non-Uniform eFPGA Architecture for Low-Overhead and Secure IP Redaction

πŸ“… 2026-01-16
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πŸ€– AI Summary
This work addresses the inefficiency of conventional eFPGA-based IP protection schemes, which employ uniform reconfigurable fabrics that incur excessive area overhead and low resource utilization, making it difficult to balance security and performance. To overcome this limitation, we propose NuRedactβ€”the first non-uniform eFPGA architecture framework tailored for IP redaction. By integrating a customized fabric structure, non-uniform placement, and redaction-aware remapping strategies, NuRedact achieves co-optimized security and hardware efficiency. Built upon an extended OpenFPGA flow, our approach features a fully automated three-stage generation and mapping process. Experimental results demonstrate that NuRedact reduces area overhead by up to 9Γ— compared to uniform architectures while maintaining strong resilience against SAT, cyclic, and sequential attacks, and delivering performance comparable to LUT- and even transistor-level redaction techniques.

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πŸ“ Abstract
While logic locking has been extensively studied as a countermeasure against integrated circuit (IC) supply chain threats, recent research has shifted toward reconfigurable-based redaction techniques, e.g., LUT- and eFPGA-based schemes. While these approaches raise the bar against attacks, they incur substantial overhead, much of which arises not from genuine functional reconfigurability need, but from artificial complexity intended solely to frustrate reverse engineering (RE). As a result, fabrics are often underutilized, and security is achieved at disproportionate cost. This paper introduces NuRedact, the first full-custom eFPGA redaction framework that embraces architectural non-uniformity to balance security and efficiency. Built as an extension of the widely adopted OpenFPGA infrastructure, NuRedact introduces a three-stage methodology: (i) custom fabric generation with pin-mapping irregularity, (ii) VPR-level modifications to enable non-uniform placement guided by an automated Python-based optimizer, and (iii) redaction-aware reconfiguration and mapping of target IP modules. Experimental results show up to 9x area reduction compared to conventional uniform fabrics, achieving competitive efficiency with LUT-based and even transistor-level redaction techniques while retaining strong resilience. From a security perspective, NuRedact fabrics are evaluated against state-of-the-art attack models, including SAT-based, cyclic, and sequential variants, and show enhanced resilience while maintaining practical design overheads.
Problem

Research questions and friction points this paper is trying to address.

IP redaction
eFPGA
logic locking
reverse engineering
hardware security
Innovation

Methods, ideas, or system contributions that make the work stand out.

non-uniform eFPGA
IP redaction
logic obfuscation
hardware security
OpenFPGA
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Voktho Das
Department of Electrical and Computer Engineering (ECE), University of Central Florida, Orlando, FL 32816, USA
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Kimia Azar
Department of Electrical and Computer Engineering (ECE), University of Central Florida, Orlando, FL 32816, USA
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Hadi Kamali
Assistant Professor at University of Central Florida
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