Deterministic Random Bit Generators Based on Ascon for Embedded Systems

2025-12-01

AI Summary

Addressing the challenge of balancing security and efficiency in deterministic random bit generators (DRBGs) for resource-constrained embedded systems, this paper proposes—based on the NIST lightweight cryptographic standard Ascon—the first systematic family of Ascon-driven DRBG constructions: Ascon-Hash, Ascon-HMAC, and Ascon-CTR. These designs deeply integrate Ascon’s native structure while fully complying with NIST SP 800-90A requirements, achieving substantial reductions in computational overhead and memory footprint. Experimental evaluation on Raspberry Pi demonstrates that the proposed DRBGs achieve 23–37% higher average throughput and reduce RAM usage by 41–58% compared to state-of-the-art lightweight DRBGs (e.g., ChaCha20-DRBG, AES-CTR-DRBG). This work bridges a critical gap in Ascon’s applicability, establishing a new paradigm for efficient, secure, and standards-compliant random number generation tailored to low-power cryptographic hardware.

Technology Category

• Machine Learning: Hardware-aware ML
• Data Mining & Knowledge Management: Conversational Systems for Recommendation & Retrieval
• Constraint Satisfaction and Optimization: Distributed CSP/Optimization

Application Category

• Security and Privacy: Large-scale security measurements
• Systems and Infrastructure for Web, Mobile and WoT: Web performance, measurement, and characterization
• Search and Retrieval-Augmented AI: Efficiency and scalability of Web search engines

Abstract

As the Deterministic Random Bit Generator (DRBG) serves as a fundamental component in random number generation and cryptographic applications, its performance and security are particularly critical in resource-constrained embedded systems, where memory capacity and computational efficiency are limited. Establishing a high-performance and secure DRBG is therefore an important issue for embedded system design. Furthermore, the National Institute of Standards and Technology (NIST) established the Ascon lightweight cryptographic standard in August 2025, which is suitable for use in resource-limited embedded environments. Therefore, this study revises the DRBG standard and proposes three Ascon-driven constructions: the Ascon-Driven Hash-Based DRBG, the Ascon-Driven keyed-Hash Message Authentication Code (HMAC) DRBG, and the Ascon-Driven Counter-mode (CTR) DRBG. In the experiments, these methods are implemented on a Raspberry Pi platform. The experimental results demonstrate that the proposed approaches achieve higher computational efficiency and lower memory usage compared with existing DRBG implementations, making them suitable for deployment in embedded systems.

Problem

• Designing high-performance, secure DRBGs for resource-constrained embedded systems
• Revising DRBG standards using the lightweight Ascon cryptographic algorithm
• Improving computational efficiency and reducing memory usage in embedded DRBGs

Innovation

• Ascon-based DRBG designs for embedded systems
• Three lightweight constructions: Hash, HMAC, CTR
• Higher efficiency and lower memory usage demonstrated