IVE: An Accelerator for Single-Server Private Information Retrieval Using Versatile Processing Elements

2025-12-01

AI Summary

Single-server private information retrieval (PIR) suffers from DRAM bandwidth bottlenecks and high computational overhead, hindering efficient privacy-preserving query processing over large-scale databases. To address this, we propose a heterogeneous memory acceleration architecture tailored for homomorphic encryption-based PIR. Our design features a highly reusable on-chip scratchpad and a customized systolic NTT unit (sysNTTU) to optimize DRAM access; introduces multi-client batching and cooperative scheduling to enhance data locality and hardware utilization; and constructs a linearly scalable heterogeneous memory system. Experimental evaluation demonstrates up to 1275× higher throughput compared to state-of-the-art PIR hardware accelerators. Notably, our architecture enables real-time, privacy-preserving retrieval over gigabyte-scale databases on a single server for the first time.

Technology Category

• Machine Learning: Hardware-aware ML
• Search and Optimization: Distributed Search
• Data Mining & Knowledge Management: Intelligent Query Processing

Application Category

• Security and Privacy: Privacy-enhancing technologies
• Search and Retrieval-Augmented AI: Personalized, context-aware and across-device search
• Responsible Web: Data and user privacy-enhancing technologies for the Web

Abstract

Private information retrieval (PIR) is an essential cryptographic protocol for privacy-preserving applications, enabling a client to retrieve a record from a server's database without revealing which record was requested. Single-server PIR based on homomorphic encryption has particularly gained immense attention for its ease of deployment and reduced trust assumptions. However, single-server PIR remains impractical due to its high computational and memory bandwidth demands. Specifically, reading the entirety of large databases from storage, such as SSDs, severely limits its performance. To address this, we propose IVE, an accelerator for single-server PIR with a systematic extension that enables practical retrieval from large databases using DRAM. Recent advances in DRAM capacity allow PIR for large databases to be served entirely from DRAM, removing its dependence on storage bandwidth. Although the memory bandwidth bottleneck still remains, multi-client batching effectively amortizes database access costs across concurrent requests to improve throughput. However, client-specific data remains a bottleneck, whose bandwidth requirements ultimately limits performance. IVE overcomes this by employing a large on-chip scratchpad with an operation scheduling algorithm that maximizes data reuse, further boosting throughput. Additionally, we introduce sysNTTU, a versatile functional unit that enhances area efficiency without sacrificing performance. We also propose a heterogeneous memory system architecture, which enables a linear scaling of database sizes without a throughput degradation. Consequently, IVE achieves up to 1,275x higher throughput compared to prior PIR hardware solutions.

Problem

• Accelerates single-server PIR to overcome computational and memory bottlenecks
• Enables practical retrieval from large databases using DRAM and on-chip scratchpad
• Introduces versatile functional unit and heterogeneous memory for scalable throughput

Innovation

• Accelerator with versatile processing elements for PIR
• On-chip scratchpad and scheduling algorithm for data reuse
• Heterogeneous memory system for scalable database sizes