M100: An Orchestrated Dataflow Architecture Powering General AI Computing

2026-04-20

AI Summary

This work addresses the dual challenges in general-purpose AI computing: the low energy efficiency of GPGPUs and the poor generalization of domain-specific architectures. To overcome these limitations, the authors propose M100, a dataflow-parallel architecture co-designed in hardware and software that eliminates conventional cache hierarchies and instead treats tensors as the unified scheduling unit. Data movement is managed collaboratively by the compiler and runtime system, enabling direct on-chip and off-chip memory transfers. The architecture demonstrates strong generality for AI inference across diverse workloads, including autonomous driving (UniAD) and large language models (LLaMA), achieving significantly higher computational utilization and energy efficiency compared to GPGPUs.

Technology Category

• Machine Learning: Hardware-aware ML
• Cognitive Modeling & Cognitive Systems: Agent Architectures
• Humans and AI: Other Foundations of Human Computation & AI

Application Category

• Systems and Infrastructure for Web, Mobile and WoT: Applied ML and AI for Web-based mobile applications
• Economics, Online Markets and Human Computation: Architectures and workflows that use LLMs for crowd work
• Graph Algorithms and Modeling for the Web: Foundation models and LLMs for Web-related graphs

Abstract

As deep learning-based AI technologies gain momentum, the demand for general-purpose AI computing architectures continues to grow. While GPGPU-based architectures offer versatility for diverse AI workloads, they often fall short in efficiency and cost-effectiveness. Various Domain-Specific Architectures (DSAs) excel at particular AI tasks but struggle to extend across broader applications or adapt to the rapidly evolving AI landscape. M100 is Li Auto's response: a performant, cost-effective architecture for AI inference in Autonomous Driving (AD), Large Language Models (LLMs), and intelligent human interactions, domains crucial to today's most competitive automobile platforms. M100 employs a dataflow parallel architecture, where compiler-architecture co-design orchestrates not only computation but, more critically, data movement across time and space. Leveraging dataflow computing efficiency, our hardware-software co-design improves system performance while reducing hardware complexity and cost. M100 largely eliminates caching: tensor computations are driven by compiler- and runtime-managed data streams flowing between computing elements and on/off-chip memories, yielding greater efficiency and scalability than cache-based systems. Another key principle was selecting the right operational granularity for scheduling, issuing, and execution across compiler, firmware, and hardware. Recognizing commonalities in AI workloads, we chose the tensor as the fundamental data element. M100 demonstrates general AI computing capability across diverse inference applications, including UniAD (for AD) and LLaMA (for LLMs). Benchmarks show M100 outperforms GPGPU architectures in AD applications with higher utilization, representing a promising direction for future general AI computing.

Problem

• General AI Computing
• Domain-Specific Architecture
• AI Inference
• Dataflow Architecture
• Hardware-Software Co-design

Innovation

• dataflow architecture
• compiler-architecture co-design
• tensor-centric computing
• cache-less design
• general AI inference