ASiM: Improving Transparency of SRAM-based Analog Compute-in-Memory Research with an Open-Source Simulation Framework

2024-11-17

arXiv.org

AI Summary

SRAM-based analog compute-in-memory (ACiM) offers high energy efficiency but suffers from limited inference accuracy due to constrained ADC dynamic range and significant 1-LSB quantization errors, compounded by the absence of standardized device modeling and open-source simulation tools. Method: We propose ASiM, an open-source, PyTorch-compatible analog simulation framework supporting non-ideal device modeling, activation encoding analysis, and multi-cycle fault-tolerant computation. We systematically identify low-resolution ADCs as the primary accuracy bottleneck and introduce a hybrid in-memory architecture with MSB-majority voting for enhanced reliability without sacrificing energy efficiency. Contribution/Results: Experiments demonstrate that activation encoding exhibits strong noise robustness. Our approach restores ResNet accuracy to 99.0% on CIFAR-10 and 72.3% on ImageNet—matching software-level performance—while preserving ACiM’s energy-efficiency advantages.

Technology Category

• Cognitive Modeling & Cognitive Systems: Analogy
• Machine Learning: Hardware-aware ML
• Search and Optimization: Sampling/Simulation-based Search

Application Category

• Search and Retrieval-Augmented AI: Web evaluation methodologies and metrics
• User Modeling, Personalization and Recommendation: On-Device user modeling, personalization, and recommendation
• Systems and Infrastructure for Web, Mobile and WoT: Applied ML and AI for Web-based mobile applications

Abstract

SRAM-based Analog Compute-in-Memory (ACiM) demonstrates promising energy efficiency for deep neural network (DNN) processing. Although recent aggressive design strategies have led to successive improvements on efficiency, there is limited discussion regarding the accompanying inference accuracy challenges. Given the growing difficulty in validating ACiM circuits with full-scale DNNs, standardized modeling methodology and open-source inference simulator are urgently needed. This paper presents ASiM, a simulation framework specifically designed to assess inference quality, enabling comparisons of ACiM prototype chips and guiding design decisions. ASiM works as a plug-and-play tool that integrates seamlessly with the PyTorch ecosystem, offering speed and ease of use. Using ASiM, we conducted a comprehensive analysis of how various design factors impact DNN inference. We observed that activation encoding can tolerate certain levels of quantization noise, indicating a substantial potential for bit-parallel scheme to enhance energy efficiency. However, inference accuracy is susceptible to noise, as ACiM circuits typically use limited ADC dynamic range, making even small errors down to 1 LSB significantly deteriorates accuracy. This underscores the need for high design standards, especially for complex DNN models and challenging tasks. In response to these findings, we propose two solutions: Hybrid Compute-in-Memory architecture and majority voting to secure accurate computation of MSB cycles. These approaches improve inference quality while maintaining energy efficiency benefits of ACiM, offering promising pathways toward reliable ACiM deployment in real-world applications.

Problem

• Addressing accuracy challenges in SRAM-based Analog Compute-in-Memory for DNNs
• Providing standardized modeling and open-source tools for ACiM validation
• Proposing solutions to maintain energy efficiency while improving inference quality

Innovation

• Open-source simulation framework ASiM
• Hybrid Compute-in-Memory architecture
• Majority voting for MSB cycles