Learning What to Retain: Gated-Memory Routing for Efficient Collaboration in Multi-Agent LLM Systems

📅 2026-08-31
📈 Citations: 0
Influential: 0
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🤖 AI Summary
论文提出Gated-Memory Routing方法,通过学习执行记忆和自适应停止控制器解决多代理LLM系统中协作效率与准确性问题。
📝 Abstract
Large language model (LLM)-based multi-agent systems tackle complex reasoning by orchestrating how multiple agents are configured and how they collaborate. A central challenge is to adapt orchestration to the evolving collaboration state. Routing from the query alone cannot adapt to intermediate progress or errors, which hurts accuracy. Routing from the complete execution history supplies this missing context, but forces later decisions to process every prior step, including redundant or low-utility ones. This creates an execution-history overload that inflates cost. Effective orchestration instead requires a compact state that captures useful progress without accumulating redundant context. We propose Gated-Memory Routing, which conditions each decision on the query and a learned execution memory. A learned Memory Write Gate commits only non-redundant reasoning steps, and a learned Retrieval Gate supplies each agent a compact, relevant subset, so every decision conditions on a clean, informative state. At each step, the system selects the next role and backbone from this memory, while an Adaptive Halting Controller stops execution once the memory contains sufficient evidence for answering. Across five reasoning and code-generation benchmarks, our framework is both effective and efficient: it attains the best average accuracy, exceeding the strongest baseline by 2.44 points, while reducing HumanEval inference cost by 31.9% relative to that baseline. Code is available at https://github.com/rajibrhasan/gated-memory-routing
Problem

Research questions and friction points this paper is trying to address.

multi-agent systems
large language model
orchestration
execution history
cost efficiency
Innovation

Methods, ideas, or system contributions that make the work stand out.

Gated-Memory Routing
Memory Write Gate
Retrieval Gate
Adaptive Halting Controller
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