Overview and Performance Evaluation of Supervisory Controller Synthesis with Eclipse ESCET v4.0
🤖 AI Summary
Automated design and safety verification of supervisory controllers for complex cyber-physical systems (CPS) face performance bottlenecks due to the gap between theoretical symbolic synthesis algorithms and engineering practice. Method: This work proposes a model-driven, hierarchical symbolic synthesis approach built upon the Eclipse ESCET toolset and the Compositional Interchange Format (CIF) modeling language. The approach introduces an enhanced synthesis architecture supporting diverse requirement specifications, integration of external variables, and full closed-loop workflow—addressing longstanding omissions in conventional methods, such as requirement mapping, realizability checking, and code generation. It further innovates with multi-level synthesis strategies, systematically evaluated for efficacy. Contribution/Results: A benchmark suite comprising 23 industrial and academic case studies is released. Empirical evaluation across ESCET versions v0.8–v4.0 demonstrates substantial improvements in synthesis efficiency and scalability, validating the feasibility and optimization potential of CIF-based modeling and hierarchical synthesis in real-world CPS applications.
Application Category
📝 Abstract
Supervisory controllers control cyber-physical systems to ensure their correct and safe operation. Synthesis-based engineering (SBE) is an approach to largely automate their design and implementation. SBE combines model-based engineering with computer-aided design, allowing engineers to focus on'what'the system should do (the requirements) rather than'how'it should do it (design and implementation). In the Eclipse Supervisory Control Engineering Toolkit (ESCET) open-source project, a community of users, researchers, and tool vendors jointly develop a toolkit to support the entire SBE process, particularly through the CIF modeling language and tools. In this paper, we first provide a description of CIF's symbolic supervisory controller synthesis algorithm, and thereby include aspects that are often omitted in the literature, but are of great practical relevance, such as the prevention of runtime errors, handling different types of requirements, and supporting input variables (to connect to external inputs). Secondly, we introduce and describe CIF's benchmark models, a collection of 23 freely available industrial and academic models of various sizes and complexities. Thirdly, we describe recent improvements between ESCET versions v0.8 (December 2022) and v4.0 (June 2024) that affect synthesis performance, evaluate them on our benchmark models, and show the current practical synthesis performance of CIF. Fourthly, we briefly look at multi-level synthesis, a non-monolithic synthesis approach, evaluate its gains, and show that while it can help to further improve synthesis performance, further performance improvements are still needed to synthesize complex models.
Problem
Research questions and friction points this paper is trying to address.
Automating supervisory controller design for cyber-physical systems
Evaluating synthesis algorithm performance using benchmark models
Addressing practical synthesis challenges like runtime error prevention
Innovation
Methods, ideas, or system contributions that make the work stand out.
Uses symbolic supervisory controller synthesis algorithm
Implements multi-level non-monolithic synthesis approach
Provides benchmark models for performance evaluation
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2024-06-05Citations: 1
