🤖 AI Summary
In QLC 3D NAND flash memory, lateral charge migration (LCM) among adjacent word lines severely degrades data retention, resulting in high bit error rates (BER). Existing mitigation strategies focus solely on intra-page data mapping, neglecting inter-page layout effects on global LCM suppression.
Method: This work proposes a physics-informed LSTM model that learns and optimizes intra-page data patterns in an end-to-end, deployable sequence-to-sequence non-repetitive data rearrangement framework—without adding extra metadata or flag bits—by explicitly embedding device-level physical characteristics (e.g., charge coupling dynamics) into the LSTM architecture.
Contribution/Results: To our knowledge, this is the first approach to integrate device physics directly into an LSTM-based data arrangement scheme. Experiments demonstrate that, at codeword length 64, the method reduces average BER by 80.4% compared to no rearrangement, outperforming WBVM and DVDS by 18.4% and 15.2%, respectively.
📝 Abstract
Quarter level cell (QLC) 3D NAND flash memory is emerging as the predominant storage solution in the era of artificial intelligence. QLC 3D NAND flash stores 4 bit per cell to expand the storage density, resulting in narrower read margins. Constrained to read margins, QLC always suffers from lateral charge migration (LCM), which caused by non-uniform charge density across adjacent memory cells. To suppress charge density gap between cells, there are some algorithm in form of intra-page data mapping such as WBVM, DVDS. However, we observe inter-page data arrangements also approach the suppression. Thus, we proposed an intelligent model PDA-LSTM to arrange intra-page data for LCM suppression, which is a physics-knowledge-driven neural network model. PDA-LSTM applies a long-short term memory (LSTM) neural network to compute a data arrangement probability matrix from input page data pattern. The arrangement is to minimize the global impacts derived from the LCM among wordlines. Since each page data can be arranged only once, we design a transformation from output matrix of LSTM network to non-repetitive sequence generation probability matrix to assist training process. The arranged data pattern can decrease the bit error rate (BER) during data retention. In addition, PDA-LSTM do not need extra flag bits to record data transport of 3D NAND flash compared with WBVM, DVDS. The experiment results show that the PDA-LSTM reduces the average BER by 80.4% compared with strategy without data arrangement, and by 18.4%, 15.2% compared respectively with WBVM and DVDS with code-length 64.