Boundaries of Acceptable Defectiveness: Redefining Surface Code Robustness under Heterogeneous Noise

📅 2025-10-24
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🤖 AI Summary
Conventional homogeneous noise models fail to characterize quantum error correction performance on superconducting quantum processors due to spatially non-uniform qubit noise. Method: We introduce the concept of “Boundaries of Acceptable Defects” (BADs) to quantify how individual qubit physical error rates and their spatial positions affect logical error rates in rotated surface codes. Leveraging the STIM simulation framework, we perform large-scale sampling over distance-3–17 surface code circuits under heterogeneous noise models. Contribution/Results: We find that defective qubits with physical error rates ≤0.75% exert negligible impact on logical fidelity—provided appropriate code distances and qubit layouts are selected. However, spatial non-uniformity in error rates significantly degrades fault-tolerance performance. Crucially, this work reframes qubit defects and system uniformity as a continuous spectrum rather than a binary pass/fail criterion. It establishes a quantitative evaluation framework for fault-tolerant quantum computation on non-ideal hardware and provides concrete hardware fidelity targets for scalable quantum processor design.

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📝 Abstract
A variety of past research on superconducting qubits shows that these devices exhibit considerable variation and thus cannot be accurately depicted by a uniform noise model. To combat this often unrealistic picture of homogeneous noise in quantum processors during runtime, our work aims to define the boundaries of acceptable defectiveness (BADs), or the upper boundary of a qubits physical error, past which this defective qubit entirely degrades the logical computation and should be considered faulty and removed from the surface code mapping. Using the QEC simulation package STIM, repetition code circuits on rotated surface codes were generated, sampled, and analyzed from distances 3 to 17, with various defective error rates and outlier defect locations. In addition, we simulated heterogeneous noise models using the same parameters to test how increasingly deviated distributions of physical errors scale across code distances under realistic, heterogeneous noise models that are informed by current superconducting hardware. The results suggest that there are, in fact, boundaries of acceptable defectiveness in which a defective qubit, with a physical error rate $<= .75$%, can be left in the lattice with negligible impact on logical error rate given sufficient code distances and proper placement in the lattice. On the other hand, we find that substantial qubit variation around a seemingly acceptable physical error rate can severely degrade logical qubit performance. As a result, we propose that defectiveness of both individual qubits and the overall uniformity of lattice fidelity should not be viewed as all or nothing, but instead as a spectrum. Our research demonstrates how heterogeneity directly impacts logical error rate and provides preliminary goals and metrics for hardware designers to meet in order to achieve target logical performance with imperfect, non-uniform qubit qualities.
Problem

Research questions and friction points this paper is trying to address.

Defining acceptable defectiveness boundaries for qubits in surface codes
Analyzing how heterogeneous noise impacts quantum error correction performance
Establishing metrics for hardware with imperfect non-uniform qubit qualities
Innovation

Methods, ideas, or system contributions that make the work stand out.

Defining boundaries for acceptable qubit defectiveness
Simulating heterogeneous noise models using STIM
Proposing spectrum-based qubit defectiveness assessment
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J
Jacob S. Palmer
Computer Science, Northwestern University, Evanston, U.S.A.
Kaitlin N. Smith
Kaitlin N. Smith
Northwestern University