In-DRAM True Random Number Generation Using Simultaneous Multiple-Row Activation: An Experimental Study of Real DRAM Chips

2025-10-23

AI Summary

Commercial DRAM chips exhibit simultaneous multi-row activation (SiMRA), a phenomenon whose intrinsic randomness for true random number generation (TRNG) remains unexplored. Method: This work systematically characterizes SiMRA across 96 DDR4 chips under varying conditions—row counts (4–32), temperatures (25–85°C), data patterns, and spatial locations—and validates entropy quality using NIST SP 800-22 statistical tests. Contribution/Results: We demonstrate that SiMRA entropy scales significantly with activated row count (2.51× average increase at 32 rows), with all configurations passing all NIST tests. The proposed SiMRA-based TRNG achieves up to 1.99× higher throughput than baseline designs. Robustness analysis reveals a 1.53× entropy reduction under elevated temperature (85°C), establishing a practical operating boundary. To foster reproducibility and further research, we open-source the complete hardware and software infrastructure, establishing the first foundation for DRAM-native TRNGs.

Technology Category

• Machine Learning: Hardware-aware ML
• Search and Optimization: Sampling/Simulation-based Search
• Reasoning under Uncertainty: Stochastic Optimization

Application Category

• Search and Retrieval-Augmented AI: Web evaluation methodologies and metrics
• Security and Privacy: Large-scale security measurements
• Web Mining and Content Analysis: Web data generation and simulation

Abstract

In this work, we experimentally demonstrate that it is possible to generate true random numbers at high throughput and low latency in commercial off-the-shelf (COTS) DRAM chips by leveraging simultaneous multiple-row activation (SiMRA) via an extensive characterization of 96 DDR4 DRAM chips. We rigorously analyze SiMRA's true random generation potential in terms of entropy, latency, and throughput for varying numbers of simultaneously activated DRAM rows (i.e., 2, 4, 8, 16, and 32), data patterns, temperature levels, and spatial variations. Among our 11 key experimental observations, we highlight four key results. First, we evaluate the quality of our TRNG designs using the commonly-used NIST statistical test suite for randomness and find that all SiMRA-based TRNG designs successfully pass each test. Second, 2-, 8-, 16-, and 32-row activation-based TRNG designs outperform the state-of-theart DRAM-based TRNG in throughput by up to 1.15x, 1.99x, 1.82x, and 1.39x, respectively. Third, SiMRA's entropy tends to increase with the number of simultaneously activated DRAM rows. Fourth, operational parameters and conditions (e.g., data pattern and temperature) significantly affect entropy. For example, for most of the tested modules, the average entropy of 32-row activation is 2.51x higher than that of 2-row activation. For example, increasing the temperature from 50°C to 90°C decreases SiMRA's entropy by 1.53x for 32-row activation. To aid future research and development, we open-source our infrastructure at https://github.com/CMU-SAFARI/SiMRA-TRNG.

Problem

• Generating true random numbers using simultaneous DRAM row activation
• Evaluating entropy and throughput across different activation configurations
• Analyzing temperature and data pattern effects on randomness quality

Innovation

• Using simultaneous multiple-row activation in DRAM
• Generating true random numbers with high throughput
• Leveraging commercial DRAM chips for low latency