About the job
Google’s Core Machine Learning (ML) organization is looking for an Engineering Manager to join our pioneering TPU Performance team! Our team is responsible for maximizing the speed and efficiency of Google’s custom AI chips (TPUs) for training and running massive AI/ML models. While we have a rich 10-year history of optimizing Google’s own internal AI models, our team is entering an exciting new phase. As Google expands its focus to become a major hardware provider for the broader tech industry, we are optimization partners for both Google's internal teams and major external AI companies and foundation model builders.
Responsibilities
Lead a team of software engineers focused on identifying and maintaining ML training and serving benchmarks that are representative to Google production and the broader ML industry.
Achieve performance for customer launches, and in case of third-party/open-source software (OSS) models, for engaged benchmark submissions (ML Commons, InferenceX, etc.).
Use benchmarks to identify performance opportunities and drive both near-term SOTA (e.g., custom kernels) and out-of the box performance (compiler/runtime optimizations, agentic tooling, auto-sharding) directly and in collaboration with partner teams.
Participate in algorithmic innovations exploiting new TPU hardware features and model-preserving optimizations (speculative decoding, sparsity, quantization, LoRA, etc.).
Participate in co-designing models that are TPU-friendly to showcase model quality at performance advanced to OSS models typically designed on GPUs.
Qualifications
Minimum
Bachelor’s degree or equivalent practical experience.
8 years of experience in software development.
5 years of experience leading ML design and optimizing ML infrastructure (e.g., model deployment, model evaluation, data processing, debugging, fine tuning).
3 years of experience in a technical leadership role.
2 years of experience in a people management or team leadership role.
Experience with ML performance analysis, benchmarking, and computer architecture.
Preferred
Master’s degree or PhD in Engineering, Computer Science, or a related technical field.
3 years of experience working in a complex, matrixed organization involving cross-functional, or cross-business projects.
Experience in ML accelerators (GPUs, TPUs) and low-level kernel programming/tuning using tools like CUDA, Triton, or Pallas.
Experience with compiler optimization (MLIR, OpenXLA) and integrating frameworks/serving libraries (PyTorch, JAX, vLLM) to maximize hardware efficiency.
Ability to adapt ML models to specific hardware strengths and use performance benchmarking to guide both optimization and future hardware design.