About the job
The AMD Silicon Valley Cores Methodology Team is seeking an engineer to investigate, develop, and deploy AI-driven techniques for analysis and optimization of next-generation Zen CPU cores. You will collaborate with experts across the full CPU design flow — from RTL to tape-out in the most advanced process nodes — with work that has immediate, visible impact on live projects.
Responsibilities
Leverage emerging AI and ML capabilities (including LLMs and predictive models) to develop methods & tools to analyze & optimize cpucore PPA across the full design hierarchy, from RTL through Physical Design, identifying root causes and optimization opportunities
Accelerate convergence across synthesis, floorplanning, place-and-route, timing closure, and signoff through AI-driven techniques
Build and maintain structured databases (SQL/NoSQL) and web-based dashboards to track and visualize design metrics across large multi-tile CPU implementations
Develop and improve physical design methodologies and customize EDA tool recipes across implementation steps
Collaborate with geographically distributed teams across design, CAD, and architecture
Qualifications
Minimum
No minimum qualifications listed.
Preferred
Strong physical design and timing background; familiarity with industry EDA tools (PrimeTime, Fusion Compiler, Innovus, or equivalent)
Experience with structured data (SQL, JSON, REST APIs) and web technologies (HTML/JS, data visualization)
Comfort with LLM-based development tools (Claude Code, Codex, Copilot, or similar AI-assisted workflows)
Scripting proficiency to automate design flows — Python, Tcl, Perl
Understanding of CPU microarchitecture preferred
Strong analytical and problem-solving skills with attention to detail
Ability to manage multiple projects and communicate effectively across teams