About the job
As a member of the Cellular CoreBSP Enablement team, you will be at the center of Apple’s cellular modem development from the earliest stages of each new chip program. You will be involved in the silicon bring-up on pre-silicon emulation platforms (Virtual prototypes, FPGA models) and post-silicon hardware, debugging firmware boot flows, triaging system-level crashes, and resolving cross-functional integration issues across memory maps, bus fabrics, calibration engines, and subsystem boundaries. What sets this role apart is that you’ll not only debug but also build AI systems and algorithms that learn from every failure you encounter. This transformation will turn manual triage into intelligent automation. AI-powered engineering tools, AI and LLM APIs, including MCP servers, AI agents, and automated workflows, will be utilized to accelerate crash debugging, root-cause analysis, and silicon validation. Throughout, you will document and share knowledge that enables the broader team to move faster across parallel chip programs.
Responsibilities
Boots and validates firmware across pre-silicon emulation and post-silicon hardware, using AI-assisted workflows to accelerate bring-up milestones across chip programs.
Debugs and root-causes firmware boot failures, data aborts, crashes, and system hangs using JTAG debuggers, LLDB, coredump analysis, and register-level inspection, while building retrieval and classification systems that automate pattern recognition across failure signatures.
Designs and develops AI-powered engineering tools and LLM APIs, building MCP servers, AI agents, and automated workflows for crash analysis and silicon validation.
Develops and maintains Python-based engineering tools such as register dump utilities, LLDB scripting extensions, and build/test automation that improve debug efficiency and team velocity.
Validates calibration sequences and cold/warm boot firmware flows to ensure correct hardware configuration across all boot paths.
Collaborates cross-functionally with hardware design, PHY/protocol, driver, power management, and AP/iOS platform teams to resolve integration issues spanning organizational boundaries.
Documents bring-up procedures, workarounds, and consolidated recipes that enable the broader team to execute efficiently on parallel chip programs.
Qualifications
Minimum
Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent field, and 2 years of relevant industry experience; or MS a plus.
Strong C/C++ programming skills in embedded, bare-metal, or RTOS environments.
Proficiency in Python for tool development, scripting, and automation.
Experience debugging firmware at the register, memory, and bus level using JTAG, trace tools, LLDB, or equivalent debug interfaces.
Ability to read and interpret hardware specifications, memory maps, and register definitions.
Experience triaging and root-causing boot failures, crashes, and system hangs in embedded platforms.
Preferred
Experience building with LLM APIs or AI SDKs — tool use, prompt engineering, or agentic architectures.
Familiarity with MCP server development or AI-agent integration with engineering tools and data sources.
Coursework or project experience in ML/AI — classification, embeddings, or information retrieval.
Experience with silicon bring-up, board bring-up, or pre-silicon FPGA emulation workflows.
Exposure to cellular or wireless modem firmware (LTE, 5G NR) or ARM architectures.
Experience with LLDB scripting or Python APIs for automated crash analysis.
Clear communication and ability to drive results across teams.