About the job
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products! The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver groundbreaking Apple products!
Apple’s Silicon Engineering Group (SEG) designs high-performance, low power microprocessors that power our innovative products, including the iPhone, iPad, Watch, Vision Pro, and Mac We are looking for an experienced engineer to drive CPU machine-learning accelerator architecture and RTL development for Apple Silicon.
Responsibilities
Micro-architecture development and specification - from early high-level architectural exploration, through micro-architectural research and arriving at a detailed specification
RTL ownership - development, assessment and refinement of RTL design to target power, performance, area and timing goals
Verification - support the verification team in test bench development, formal methods, and simulation/emulation for functional verification
Performance exploration and correlation - explore high-performance strategies and work with the performance verification team to verify that the RTL design meets targeted performance
Design delivery - work with multi-functional engineering team to implement and verify physical design on the aspects of timing, area, reliability, testability and power
Qualifications
Minimum
Minimum BS and 3+ years of relevant industry experience
Experience with microprocessor architecture
Experience with logic design principles with timing and power implications
Experience in Verilog or VHDL
Experience with simulators and waveform debugging process
Preferred
Expertise in one or more of the following areas: out-of-order execution, instruction scheduling, integer and floating point execution, load/store execution, cache and memory subsystems
Understanding of low power microarchitecture techniques
Understanding of high-performance techniques and trade-offs in a CPU microarchitecture
Experience in C or C++ programming
Experience using an interpretive language such as Perl or Python