In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. In this role, you will help build the SoC’s that power these data centers by developing and deploying comprehensive test solutions with Automatic Test Equipment (ATE) for New Product Introduction (NPI) and for High Volume Manufacturing (HVM) at wafer fabs and OSATs.

Develop System Level Test (SLT) solutions for custom Application-Specific Integrated Circuits (ASIC) and SoC’s by specifying hardware and integration requirements, driving vendor interactions, developing software frameworks and test modules, and integrating test cases from silicon validation and system software and test teams.

Partner with data center server and accelerator design teams to realize practical test solutions leveraging system design and test elements.

Partner with hardware and software teams to evaluate functional device yield and performance across various operating conditions, characterize hardware/software interaction, and develop effective production screens to reduce defective parts per million.

Integrate test software and hardware solutions with robotic chip handlers, drive bring-up of the fully integrated solution in internal and partner NPI labs, transfer all collaterals needed for HVM at Offshore Assembly and Test (OSAT) facilities, and provide ongoing HVM support.