About the job
In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
Responsibilities
Understand the overall application of the chip, proposing and developing improvements in overall design.
Design and document one or more blocks of an ASIC, including functionality and timing.
Work closely with Software teams on functionality, interfaces, and documentation.
Qualifications
Minimum
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
8 years of experience with custom silicon design (SoCs, ASICs, etc.).
Experience with RTL (Register Transfer Level) design using Verilog or SystemVerilog.
Preferred
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
Experience interacting with software, architecture, and other cross-functional teams.
Experience with a scripting language (e.g., Python or Perl).
Experience applying engineering best practices (e.g., code review, testing, refactoring).
Knowledge of processor design, accelerators, or memory hierarchies and machine learning algorithms.
Knowledge of high performance and low power design techniques.